RTL8181 Wireless LAN Access Point/Gateway Controller DATA ...

RTL8181Timer/Counter 3 Data register (TC3CNT)Bit Bit Name Description R/W InitVal31-0 TC3Value[31:0] The timer or counter initial value R/WTimer/Counter Control register (TCCNR)Bit Bit Name Description R/W InitVal11 TC3Src Timer/Counter 3 clock sourceR/W 00=Base clock1=Basic timer10 TC2Src Timer/Counter 2 clock sourceR/W 00=Base clock1=Basic timer9 TC1Src Timer/Counter 1 clock sourceR/W 00=Base clock1=Basic timer8 TC0Src Timer/Counter 0 clock sourceR/W 00=Base clock1=Basic timer7 TC3Mode Timer/Counter 3 modeR/W 00=counter mode1=timer mode6 TC3En Timer/Counter 3 enable R/W 05 TC2Mode Timer/Counter 2 modeR/W 00=counter mode1=timer mode4 TC2En Timer/Counter 2 enable R/W 03 TC1Mode Timer/Counter 1 modeR/W 00=counter mode1=timer mode2 TC1En Timer/Counter 1 enable R/W 01 TC0Mode Timer/Counter 0 modeR/W 00=counter mode1=timer mode0 TC0En Timer/Counter 0 enable R/W 0Timer/Counter Interrupt Register (TCIR)Bit Bit Name Description R/W InitVal7 TC3IP Timer/Counter 3 interrupt pending. Write “1” to R/W 0clear the interrupt.6 TC2IP Timer/Counter 2 interrupt pending. Write “1” to R/W 0clear the interrupt.5 TC1IP Timer/Counter 1 interrupt pending. Write “1” to R/W 0clear the interrupt.4 TC0IP Timer/Counter 0 interrupt pending. Write “1” to R/W 0clear the interrupt.3 TC3IE Timer/Counter 3 interrupt enable R/W 02 TC2IE Timer/Counter 2 interrupt enable R/W 01 TC1IE Timer/Counter 1 interrupt enable R/W 00 TC0IE Timer/Counter 0 interrupt enable R/W 0Clock Division Base Register (CDBR)Bit Bit Name Description R/W InitVal15-0 DivFactor The divided factor of clock source. If DivFactor is R/W 0N, the watchdag timer divide by N+1.This valuecould not be 0 in timer mode or watchdog. Theclock source is 22MHz.Watchdog Control Register (WDTCNR)34CONFIDENTIAL v1.0