RTL8181 Wireless LAN Access Point/Gateway Controller DATA ...

More documents

Recommendations

Info

RTL818110 = enable rising edge interrupt11 = enable both falling or rising edge interrupt5-4 PB2IM[1:0] PortB.2 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interrupt7-6 PB3IM[1:0] PortB.3 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interrupt9-8 PB4IM[1:0] PortB.4 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interrupt11-10 PB5IM[1:0] PortB.5 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interrupt13:12 PB6IM[1:0] PortB.6 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interrupt15-14 PB7IM[1:0] PortB.7 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interrup t17-16 PB8IM[1:0] PortB.8 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interrupt19-18 PB9IM[1:0] PortB.9 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt21-20 PB10IM[1:0]23:22 PB11IM[1:0]25-24 PB12IM[1:0]27-26 PB13IM[1:0]11 = enable both falling or rising edge interruptPortB.10 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interruptPortB.11 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interruptPortB.12 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interruptPortB.13 interrupt mode00 = disable interruptR/W 00R/W 00R/W 00R/W 00R/W 00R/W 00R/W 00R/W 00R/W 00R/W 00R/W 00R/W 0036CONFIDENTIAL v1.0
RTL818129-28 PB14IM[1:0]31-30 PB15IM[1:0]01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interruptPortB.14 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interruptPortB.15 interrupt mode00 = disable interrupt01 = enable falling edge interrupt10 = enable rising edge interrupt11 = enable both falling or rising edge interruptR/W 00R/W 00Port B Interrupt Status Register (PBISR)Bit Bit Name Description R/W InitVal15-0 PBIP[15:0] Interrupt pending status. Self clear after read. R 0012. 802.11b WLAN ControllerRTL8181 integrates with a wireless LAN MAC and a direct sequence spread spectrum baseband processor, and is fullcompliance with IEEE 802.11 and IEEE 802.11b specifications.RTL8181 has on board A/D and D/A converters for analog I and Q inputs and outputs. Differential phase shift keyingmodulation schemes DBPSK and DQPSK, with data scrambling capability, are available along with complementary codekeying to provide a variety of data rates. Both receive and transmit AGC functions obtain maximum performance in the analogportions of the transceiver. It also includes a built-in enhanced signal detector to alleviate severe multi-path effects. The targetenvironment for 11Mbps is 125ns RMS delay spread. It also supports short preamble and antenna diversity. For security issues,RTL8181 has implemented a high performance internal WEP engine supporting up to 104-bits WEP.The WLAN controller is a DMA bus-master device, and uses descriptor-based buffer structure for packet transmission andreception. These features will definitely offload much CPU loading.RTL818 provides various interfaces for external RF module. Currently, it could interface with the RF modules as Intersil,RFMD and Philip.WLAN Controller register SetVirtual Address Size Name Description R/W(byte)0xBD40_0000 8 WLAN_ID ID Register : The ID register is only permitted to write by 4-byte R/Waccess. Read access can be byte, word, or double word access.0xBD40_0008 8 WLAN_MAR Multicast Register: The MAR register is only permitted to write by R/W4-bye access. Read access can be byte, word, or double wordaccess.0xBD40_0018 8 WLAN_TSFTR Timing Synchronization Function Timer Register R0xBD40_0020 4 WLAN_TLPDA Transmit Low Priority Descriptors Start Address (32-bit). R/W(256-byte alignment)0xBD40_0024 4 WLAN_TNPDA Transmit Normal Priority Descriptors Start Address (32-bit). R/W(256-byte alignment)0xBD40_0028 4 WLAN_THPDA Transmit High Priority Descriptors Start Address (32-bit). R/W(256-byte alignment)0xBD40_002C 4 WLAN_BRSR Basic Rate Set Register R/W0xBD40_002E 6 WLAN_BSSID Basic Service Set ID R/W0xBD40_0037 1 WLAN_CR Command Register R/W0xBD40_003C 2 WLAN_IMR Interrupt Mask Register R/W0xBD40_003E 2 WLAN_ISR Interrupt Status Register R/W0xBD40_0040 4 WLAN_TCR Transmit (Tx) Configuration Register R/W0xBD40_0044 4 WLAN_RCR Receive (Rx) Configuration Register R/W0xBD40_0048 4 WLAN_TINT Timer Interrupt Register. Once having written a nonzero value to R/W37CONFIDENTIAL v1.0
Page 1 and 2: RTL8181 Wireless LAN Access Point/G
Page 3 and 4: RTL8181Table of Contents1. OVERVIEW
Page 5 and 6: RTL8181Fast Ethernet Controller? Fu
Page 7 and 8: RTL8181WLTXRX O 64 T18 WLAN Tx/Rx t
Page 9 and 10: RTL8181TRSWN O 79 L20 Transmit and
Page 11 and 12: RTL8181TRDYBS/T/Scomplete the curre
Page 13 and 14: RTL8181Memory map (without TLB):Vir
Page 15 and 16: RTL81810xBD30_0014 ETH1_TSAD Ethern
Page 17 and 18: RTL818123 DISPCIB Disable PCI bridg
Page 19 and 20: RTL8181Besides, RTL8181could also s
Page 21 and 22: RTL8181The read access timing of fl
Page 23 and 24: RTL818112 FSWInt Forced software in
Page 25 and 26: RTL8181NIC to send PAUSE 0x0000 pac
Page 27 and 28: RTL81810 15-0 Frame_Le Transmit fra
Page 29 and 30: RTL81810 29-13 - Reserved.0 12-0 Bu
Page 31 and 32: RTL81810xBD01_00D7 1 UART_LSR Line
Page 33 and 34: RTL81817 DCD In loopback mode, retu
Page 35: RTL8181Bit Bit Name Description R/W
Page 39 and 40: RTL8181Bit Bit Name Description R/W
Page 41 and 42: RTL8181Transmit Configuration Regis
Page 43 and 44: RTL81810: Reject4 - Reserved3 AB Ac
Page 45 and 46: RTL8181Beacon Interval Register (WL
Page 47 and 48: RTL81813 SBQ Stop Beacon Queue: Wri
Page 49 and 50: RTL8181Package outline for 208 LQFP

RTL8181 Wireless LAN Access Point/Gateway Controller DATA ...

Create successful ePaper yourself

Delete template?

Save as template?