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RTL8181 Wireless LAN Access Point/Gateway Controller DATA ...

RTL8181 Wireless LAN Access Point/Gateway Controller DATA ...

RTL8181 Wireless LAN Access Point/Gateway Controller DATA ...

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<strong>RTL8181</strong>this register, the Timeout bit of W<strong>LAN</strong>_ISR register will be setwhenever the least 32 bits of the W<strong>LAN</strong>_TSFTR reaches to thisvalue. The Timeout bit will never be set as long as W<strong>LAN</strong>_TINTregister is zero.0xBD40_004C 4 W<strong>LAN</strong>_TBDA Transmit Beacon Descriptor Start Address (32-bit) (256-byte alignment) R/W0xBD40_0050 1 W<strong>LAN</strong>_CR Command Register R/W0xBD40_0051 1 W<strong>LAN</strong>_CONFIG0 Configuration Regist er 0 R0xBD40_0053 1 W<strong>LAN</strong>_CONFIG2 Configuration Register 2 R/W0xBD40_0054 4 W<strong>LAN</strong>_ANAPARM Analog parameter R/W0xBD40_0058 1 W<strong>LAN</strong>_MSR Media Status Register R/W0xBD40_0059 1 W<strong>LAN</strong>_CONFIG3 Configuration Register 3 R/W0xBD40_005A 1 W<strong>LAN</strong>_CONFIG4 Configuration Register 4 R/W0xBD40_005B 1 W<strong>LAN</strong>_TESTR TEST mode Register R/W0xBD40_005F 1 W<strong>LAN</strong>_SCR Security Configuration Register R/W0xBD40_0070 2 W<strong>LAN</strong>_BCNITV Beacon Interval Register R/W0xBD40_0072 2 W<strong>LAN</strong>_ATIMWND Atim Window Register R/W0xBD40_0074 2 W<strong>LAN</strong>_BINTRITV Beacon interrupt Interval Register R/W0xBD40_0078 1 W<strong>LAN</strong>_PHYDELAY Phy Delay Register R/W0xBD40_007A 2 W<strong>LAN</strong>_CRC 16ERR PLCP header CRC16 error count R/W0xBD40_007C 1 W<strong>LAN</strong>_PHYADDR Address register for Phy interface R/W0xBD40_007D 1 W<strong>LAN</strong>_PHY<strong>DATA</strong>W Write Data to Phy W0xBD40_007E 1 W<strong>LAN</strong>_PHY<strong>DATA</strong>R Read Data from Phy R0xBD40_0080 4 W<strong>LAN</strong>_PHYCFG Phy Configuration Register R/W0xBD40_0090 16 W<strong>LAN</strong>_DK0 WEP Default Key 0 Register R/W0xBD40_00A0 16 W<strong>LAN</strong>_DK1 WEP Default Key 1 Register R/W0xBD40_00B0 16 W<strong>LAN</strong>_DK2 WEP Default Key 2 Register R/W0xBD40_00C0 16 W<strong>LAN</strong>_DK3 WEP Default Key 3 Register R/W0xBD40_00D8 1 W<strong>LAN</strong>_ CONFIG5 Configuration Register 5 R/W0xBD40_00D9 1 W<strong>LAN</strong>_TPPOLL Transmit Priority Polling Register W0xBD40_00DC 2 W<strong>LAN</strong>_ CWR Contention Window Register R0xBD40_00DE 1 W<strong>LAN</strong>_RETRYCTR Retry Count Register R0xBD40_00E4 4 W<strong>LAN</strong>_RDSAR Receive Descriptor Start Address Register (32-bit) (256-byte R/Walignment)0xBD40_0100 6 W<strong>LAN</strong>_KMAR Key Map MAC Address R/W0xBD40_0106 15 W<strong>LAN</strong>_KMKEY Key Map Key Value R/W0xBD40_0116 2 W<strong>LAN</strong>_KMC Key Map Config R/WTSF timer register (W<strong>LAN</strong>_TSFTR)Bit Bit Name Description R/W63-0 TSFT Timing Synchronization Function Timer: <strong>RTL8181</strong> maintain a TSF timer with modules 2^64 Rcounting in increments of microseconds. The 8 octets are the timestamp field of beacon andprobe response frame.Basic Rate Set Register (W<strong>LAN</strong>_BRSR)Bit Bit Name Description15-9 - Reserved8 BPLCP 0:Long PLCP header for CTS/ACK packet.1:Short PLCP header for CTS/ACK packet.7-4 - Reserved3-0 MBR Maximum Basic Service Set Basic Rate. All control frames shall betransmitted at the rate that is less than or equal.bit0: 1M, bit1: 2M, bit2: 5.5M, bit3: 11M.Basic Service Set ID register (W<strong>LAN</strong>_BSSID)Bit Bit Name Description R/W47-0 BSSID Basic Service Set Identification: This register is written to by the driver after a NIC joins anetwork or creates an adhoc network.R/WCommand Register (W<strong>LAN</strong>_CR)This register is used for issuing commands to W<strong>LAN</strong> controller. These commands are issued by setting the corresponding bits forthe function. A global software reset along with individual reset and enable/disable for transmitter and receiver are provided here.38CONFIDENTIAL v1.0

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