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Logix5000 Controllers General Instructions - SLAC Confluence

Logix5000 Controllers General Instructions - SLAC Confluence

Logix5000 Controllers General Instructions - SLAC Confluence

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336 Array (File)/Misc. <strong>Instructions</strong> (FAL, FSC, COP, CPS, FLL, AVE, SRT, STD, SIZE)The following timing diagram shows the relationship between statusbits and instruction operation. Execution occurs only in a scan inwhich the rung-condition-in goes from false to true. Each time thisoccurs, only one element of the array is manipulated. If therung-condition-in remains true for more than one scan, the instructiononly executes during the first scan.onescanrung-condition-in.EN bit.DN bitscan of the instruction40014operationcompleteclears status bits andclears .POS valueThe .EN bit is set when rung-condition-in is true. The .DN bit is setwhen the last element in the array has been manipulated. When thelast element has been manipulated and the rung-condition-in goesfalse, the .EN bit, the .DN bit, and the .POS value are cleared.The difference between incremental mode and numerical mode at arate of one element per scan is:• Numerical mode with any number of elements per scan requiresonly one false-to-true transition of the rung-condition-in to startexecution. The instruction continues to execute the specifiednumber of elements each scan until completion regardless of thestate of the rung-condition-in.• Incremental mode requires the rung-condition-in to change fromfalse to true to manipulate one element in the array.Publication 1756-RM003I-EN-P - January 2007

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