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Logix5000 Controllers General Instructions - SLAC Confluence

Logix5000 Controllers General Instructions - SLAC Confluence

Logix5000 Controllers General Instructions - SLAC Confluence

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Array (File)/Shift <strong>Instructions</strong> (BSL, BSR, FFL, FFU, LFL, LFU) 397CONTROL StructureMnemonic Data Type Description.EN BOOL The enable bit indicates that the FFL instruction is enabled..DN BOOL The done bit is set to indicate that the FIFO is full (.POS = .LEN). The .DN bit inhibits loadingthe FIFO until .POS < .LEN..EM BOOL The empty bit indicates that the FIFO is empty. If .LEN ≤ 0 or .POS < 0, both the .EM bit and.DN bit are set..LEN DINT The length specifies the maximum number of elements the FIFO can hold at one time..POS DINT The position identifies the location in the FIFO where the instruction will load the next value.Description:Use the FFL instruction with the FFU instruction to store and retrievedata in a first-in/first-out order. When used in pairs, the FFL and FFUinstructions establish an asynchronous shift register.Typically, the Source and the FIFO are the same data type.When enabled, the FFL instruction loads the Source value into theposition in the FIFO identified by the .POS value. The instructionloads one value each time the instruction is enabled, until the FIFOis full.IMPORTANTYou must test and confirm that the instruction doesn’t change data that you don’twant it to change.The FFL instruction operates on contiguous memory. In some cases, the instructionloads data past the array into other members of the tag. This happens if the length istoo big and the tag is a user-defined data type.Arithmetic Status Flags:not affectedFault Conditions:A Major Fault Will Occur If Fault Type Fault Code(starting element + .POS) > FIFO array size 4 20Publication 1756-RM003I-EN-P - January 2007

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