Architecture Modeling - SPES 2020
Architecture Modeling - SPES 2020
Architecture Modeling - SPES 2020
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<strong>Architecture</strong> <strong>Modeling</strong><br />
Another important issue when dealing with mappings is locality. Since there are no constraints<br />
in the number of mappings to link certain models, it should be best practice to keep the<br />
number of linked ports for a mapping as low as possible. The benefit it twofold: on one hand,<br />
locality maintains traceability on the relation between contracts of different models. On the<br />
other hand, it supports also locality of the respective proof obligations. However, each mapping<br />
must be verified.<br />
4.4.2 Allocation<br />
While mappings provide the common concept to establish traceability in a design, the <strong>SPES</strong>MM<br />
provides two instantiations of this concept. An allocate link associates two components within<br />
different perspectives. The intuition of an allocate link is that the source component is “executed”<br />
by the target component of the link. A function is executed by a logical component, and<br />
a logical component is executed by a technical component. The intuition also holds if we say<br />
that a technical component is “executed” by a box in the geometrical perspective.<br />
The allocate link is a high-level construct in that for each link an underlying mapping is<br />
created. Each allocate link thus requires further specification with respect the underlying mapping.<br />
In many cases however, simple mapping functions are sufficient to define allocations.<br />
<strong>SPES</strong>MM allows to refine allocate links by additional links specifying simple one-to-one relations<br />
between ports, and by textual specification of such one-to-one relations within the mapping<br />
object.<br />
Figure 4.13 depicts an example for using the allocate link. The link shown allocates logical<br />
component Capture to task CaptureTask in the technical perspective. The link is associated<br />
to a mapping object that has been further refined (not shown in the figure) to specify that<br />
the respective ports are directly linked.<br />
Logical Perspective<br />
temp tempData<br />
Capture<br />
4.4.3 Realization<br />
<br />
AirTempControl<br />
control<br />
Technical Perspective<br />
tempVal<br />
temp<br />
temp<br />
Data<br />
control<br />
Var1<br />
ECU<br />
Capture<br />
Task<br />
Figure 4.13: Allocate-Link Example<br />
Scheduler<br />
airTemp<br />
CtrlTask<br />
The second high-level construct are realize links that associate components between different<br />
abstraction levels. Since the realize link is the twin of the allocate link, the same holds as said<br />
before.<br />
Note however, that the direction of both allocate and realize links are converse. For realize<br />
links, the source component by convention associates the observed components with respect to<br />
Var2<br />
tempSel<br />
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