Architecture Modeling - SPES 2020
Architecture Modeling - SPES 2020
Architecture Modeling - SPES 2020
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5 Using the <strong>Architecture</strong> Meta-Model<br />
Design processes for embedded systems applications differ strongly within the range of application<br />
domains considered in <strong>SPES</strong> <strong>2020</strong>. In automation applications, the geometric layout of<br />
the plant is determined early in planning stages, and defines boundary conditions for other design<br />
phases. In contrast, while of course medical devices such as pace-makers must ultimately<br />
fit into a physical packaging easily insertable into the body, other aspects such as algorithm<br />
design are more dominant. Similarly, almost no industrial application will be developed purely<br />
top-down, nor purely bottom-up, and tradeoffs such as between optimizing re-use and optimizing<br />
for performance will determine the middle-out design strategy for a particular product<br />
development. Finally, target architectures are often subject to domain specific standards, such<br />
as AUTOSAR [9] in the automotive domain, and IMA in avionics, calling for a need to support<br />
a variety of domain specific standards within the <strong>SPES</strong> <strong>Architecture</strong> Metamodel. The purpose<br />
of this section can thus not be to describe something as “the <strong>SPES</strong> design process”. Rather, the<br />
purpose of this section is to show how a broad variety of design styles and design processes can<br />
be naturally expressed using the key concepts of the <strong>SPES</strong> <strong>Architecture</strong> Metamodel.<br />
An orthogonal aspect covered in this section relates to the advocation of a contract-based<br />
design style. We highlight, how typical design steps in industrial processes can benefit from<br />
contract-based design, thus motivating the anchoring of this design paradigm in the <strong>SPES</strong> metamodel.<br />
We cover these orthogonal aspects in separate sections. The style of writing is chosen so as<br />
to address a typical systems engineer. Having read the quick tour (Section 2) is an indispensable<br />
prerequisite for this section. Readers who are interested in more formal treatments of the<br />
mentioned design steps are referred to Section 4 – “Steps in component based design” – and its<br />
mathematical foundation given in the annex.<br />
5.1 On the Role of Perspectives and Abstraction Layers<br />
5.1.1 What We Can Learn from the EDA Domain<br />
Electronic design automation (EDA) has early adopted the concept of abstraction layers (to cope<br />
with complexity) and perspectives (there called “domains”) to achieve separation of concerns<br />
between different views of an integrated circuit, such as its physical layout, its logical architecture,<br />
and its behavior (see Gajski’s Y-Chart [25]). Established abstraction levels include (from<br />
lower to higher) the transistor level, the gate level, the register transfer level, the system level,<br />
and the instruction-set architecture level. Each level is essentially characterized by what is seen<br />
as a primitive building block at the chosen level of abstraction. The identity of the building<br />
block is obvious from the level name for the transistor and the gate level. For the register transfer<br />
level, these blocks include both combinational circuits such as adders, multipliers, shifters,<br />
etc., as well as sequential circuits such as latches, registers, register-files, and the various types<br />
of memory. The naming of the next higher level is predominantly used in the domain of computer<br />
architecture design, where clock-cycle accurate models describe the effect of executing<br />
instructions on the visible processor state. The term system-level, then, traditionally referred to<br />
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