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X9DR3_i-LN4F+ 1.1.indb - Supermicro

X9DR3_i-LN4F+ 1.1.indb - Supermicro

X9DR3_i-LN4F+ 1.1.indb - Supermicro

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<strong>X9DR3</strong>-<strong>LN4F+</strong>/X9DRi-<strong>LN4F+</strong> Motherboard User’s Manual<br />

64-bit<br />

This item indicates if the CPU installed in Socket 1 or Socket 2 supports 64-bit<br />

technology.<br />

Clock Spread Spectrum<br />

Select Enable to enable Clock Spectrum support, which will allow the BIOS to monitor<br />

and attempt to reduce the level of Electromagnetic Interference caused by the<br />

components whenever needed. The options are Disabled and Enabled.<br />

RTID (Record Types IDs)<br />

This feature displays the total number of Record Type IDs for local and remote<br />

pools. The options are Optimal and Alternate.<br />

Hyper-threading<br />

Select Enabled to support Intel Hyper-threading Technology to enhance CPU performance.<br />

The options are Enabled and Disabled.<br />

Active Processor Cores<br />

Set to Enabled to use a processor's second core and above. (Please refer to Intel's<br />

website for more information.) The options are All, 1 and 2.<br />

Limit CPUID Maximum<br />

Use this feature to set the maximum CPU ID value. Enable this function to boot<br />

the legacy operating systems that cannot support processors with extended CPUID<br />

functions. The options are Enabled and Disabled (for the Windows OS).<br />

Execute-Disable Bit Capability (Available if supported by the OS & the CPU)<br />

Select Enabled to enable the Execute Disable Bit which will allow the processor<br />

to designate areas in the system memory where an application code can execute<br />

and where it cannot, thus preventing a worm or a virus from flooding illegal codes<br />

to overwhelm the processor or damage the system during an attack. The default is<br />

Enabled. (Refer to Intel and Microsoft Web sites for more information.)<br />

Intel® AES-NI<br />

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions<br />

(NI) to ensure data security. The options are Enabled and Disabled.<br />

MLC Streamer Prefetcher (Available when supported by the CPU)<br />

If set to Enabled, the MLC (Mid-Level Cache) Streamer prefetcher will prefetch<br />

streams of data and instructions from the main memory to the L2 cache to improve<br />

CPU performance. The options are Disabled and Enabled.<br />

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