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Hardware Interface Description - KORE Telematics

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XT55/56 <strong>Hardware</strong> <strong>Interface</strong> <strong>Description</strong><br />

Confidential / Released<br />

s<br />

3.10.2 Speech processing<br />

The speech samples from the ADC or DAI are handled by the DSP of the baseband<br />

controller to calculate e.g. amplifications, sidetone, echo cancellation or noise suppression<br />

depending on the configuration of the active audio mode. These processed samples are<br />

passed to the speech encoder. Received samples from the speech decoder are passed to<br />

the DAC or DAI after post processing (frequency response correction, adding sidetone etc.).<br />

Full rate, half rate, enhanced full rate, adaptive multi rate (AMR), speech and channel<br />

encoding including voice activity detection (VAD) and discontinuous transmission (DTX) and<br />

digital GMSK modulation are also performed on the GSM baseband processor.<br />

Customer specific audio parameters can be evaluated and supplied by Siemens on request.<br />

These parameters can be downloaded to XT55/56 using an AT command. For further<br />

information refer to [9] or contact your Siemens distributor.<br />

3.10.3 DAI timing<br />

To support the DAI function, XT55/56 integrates a simple five-line serial interface with one<br />

input data clock line (GSM_SCLK) and input / output data and frame lines (GSM_TXDDAI,<br />

GSM_TFSDAI, GSM_RXDDAI, GSM_RFSDAI).<br />

The serial interface is always active if the external input data clock GSM_SLCK is present,<br />

i.e. the serial interface is not clocked by the DSP of the XT55/56 baseband processor.<br />

GSM_SLCK must be supplied from the application and can be in a frequency range between<br />

0.2 and 10 MHz. Serial transfer of 16-bit words is done in both directions.<br />

Data transfer to the application is initiated by the module via a short pulse of GSM_TFSDAI.<br />

The duration of the GSM_TFSDAI pulse is one GSM_SCLK period, starting at the rising<br />

edge of SLCK. During the following 16 SLCK cycles, the 16-bit sample will be transferred on<br />

the GSM_TXDDAI line. The next outgoing sample will be transferred after the next<br />

GSM_TFSDAI pulse which occurs every 125 µs.<br />

The GSM_TFSDAI pulse is the master clock of the sample transfer. From the rising edge of<br />

the GSM_TFSDAI pulse, the application has 100 µs to transfer the 16-bit input sample on the<br />

GSM_RXDDAI line. The rising edge of the GSM_RFSDAI pulse (supplied by the application)<br />

may coincide with the falling edge of GSM_TFSDAI or occur slightly later - it is only<br />

significant that, in any case, the transfer of the LSB input sample will be completed within the<br />

specified duration of 100 µs.<br />

Audio samples are transferred from the module to the application in an average of 125µs.<br />

This is determined by the 8kHz sampling rate, which is derived from and synchronized to the<br />

GSM network. As SLCK is independent of the GSM network, the distance between two<br />

succeeding sample transfers may vary about + 1 SLCK period.<br />

The application is required to adapt its sampling rate to the GSM_TFSDAI rate. Failure to<br />

synchronize the timing between the module and the application may cause audible pops and<br />

clicks in a conversation. The timing characteristics of both data transfer directions are shown<br />

in Figure 17 and Figure 18.<br />

XT55/56_hd_v02.06a Page 59 of 125 17.12.2004

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