ATMega chip full datasheet - UCSD Department of Physics

ATmega48A/PA/88A/PA/168A/PA/328/Pgenerated will have a maximum frequency of f oc2 = f clk_I/O /2 when OCR2A is set to zero. This featureis similar to the OC2A toggle in CTC mode, except the double buffer feature of the OutputCompare unit is enabled in the fast PWM mode.18.7.4 Phase Correct PWM ModeThe phase correct PWM mode (WGM22:0 = 1 or 5) provides a high resolution phase correctPWM waveform generation option. The phase correct PWM mode is based on a dual-slopeoperation. The counter counts repeatedly from BOTTOM to TOP and then from TOP to BOT-TOM. TOP is defined as 0xFF when WGM2:0 = 3, and OCR2A when MGM2:0 = 7. In noninvertingCompare Output mode, the Output Compare (OC2x) is cleared on the compare matchbetween TCNT2 and OCR2x while upcounting, and set on the compare match while downcounting.In inverting Output Compare mode, the operation is inverted. The dual-slope operation haslower maximum operation frequency than single slope operation. However, due to the symmetricfeature of the dual-slope PWM modes, these modes are preferred for motor controlapplications.In phase correct PWM mode the counter is incremented until the counter value matches TOP.When the counter reaches TOP, it changes the count direction. The TCNT2 value will be equalto TOP for one timer clock cycle. The timing diagram for the phase correct PWM mode is shownon Figure 18-7. The TCNT2 value is in the timing diagram shown as a histogram for illustratingthe dual-slope operation. The diagram includes non-inverted and inverted PWM outputs. Thesmall horizontal line marks on the TCNT2 slopes represent compare matches between OCR2xand TCNT2.Figure 18-7.Phase Correct PWM Mode, Timing DiagramOCnx Interrupt Flag SetOCRnx UpdateTOVn Interrupt Flag SetTCNTnOCnx(COMnx1:0 = 2)OCnx(COMnx1:0 = 3)Period1 2 3The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches BOTTOM. TheInterrupt Flag can be used to generate an interrupt each time the counter reaches the BOTTOMvalue.In phase correct PWM mode, the compare unit allows generation of PWM waveforms on theOC2x pin. Setting the COM2x1:0 bits to two will produce a non-inverted PWM. An inverted PWM8271D–AVR–05/11154