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ATMega chip full datasheet - UCSD Department of Physics

ATMega chip full datasheet - UCSD Department of Physics

ATMega chip full datasheet - UCSD Department of Physics

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ATmega48A/PA/88A/PA/168A/PA/328/Precovery process is then repeated until a complete frame is received. Including the first stop bit.Note that the Receiver only uses the first stop bit <strong>of</strong> a frame.Figure 20-7 on page 194 shows the sampling <strong>of</strong> the stop bit and the earliest possible beginning<strong>of</strong> the start bit <strong>of</strong> the next frame.Figure 20-7.Stop Bit Sampling and Next Start Bit SamplingRxDSTOP 1(A) (B) (C)Sample(U2X = 0)Sample(U2X = 1)1 2 3 4 5 6 7 8 9 10 0/1 0/1 0/11 2 3 4 5 6 0/1The same majority voting is done to the stop bit as done for the other bits in the frame. If the stopbit is registered to have a logic 0 value, the Frame Error (FEn) Flag will be set.A new high to low transition indicating the start bit <strong>of</strong> a new frame can come right after the last <strong>of</strong>the bits used for majority voting. For Normal Speed mode, the first low level sample can be atpoint marked (A) in Figure 20-7. For Double Speed mode the first low level must be delayed to(B). (C) marks a stop bit <strong>of</strong> <strong>full</strong> length. The early start bit detection influences the operationalrange <strong>of</strong> the Receiver.20.8.3 Asynchronous Operational RangeThe operational range <strong>of</strong> the Receiver is dependent on the mismatch between the received bitrate and the internally generated baud rate. If the Transmitter is sending frames at too fast or tooslow bit rates, or the internally generated baud rate <strong>of</strong> the Receiver does not have a similar (seeTable 20-2 on page 195) base frequency, the Receiver will not be able to synchronize theframes to the start bit.The following equations can be used to calculate the ratio <strong>of</strong> the incoming data rate and internalreceiver baud rate.Table 1.DSSum <strong>of</strong> character size and parity size (D = 5 to 10 bit)Samples per bit. S = 16 for Normal Speed mode and S = 8 for Double Speedmode.S F First sample number used for majority voting. S F = 8 for normal speed and S F = 4for Double Speed mode.S MR slow( D + 1)S( D + 2)SR slow = ------------------------------------------RS – 1 + D ⋅ S + S fast = -----------------------------------F( D + 1)S+S MMiddle sample number used for majority voting. S M = 9 for normal speed andS M = 5 for Double Speed mode.is the ratio <strong>of</strong> the slowest incoming data rate that can be accepted in relation to thereceiver baud rate. R fast is the ratio <strong>of</strong> the fastest incoming data rate that can beaccepted in relation to the receiver baud rate.8271D–AVR–05/11194

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