ATMega chip full datasheet - UCSD Department of Physics

ATmega48A/PA/88A/PA/168A/PA/328/PTable 28-13.Pin Name MappingSignal Name inProgramming Mode Pin Name I/O FunctionRDY/BSY PD1 O0: Device is busy programming, 1: Device isready for new commandOE PD2 I Output Enable (Active low)WR PD3 I Write Pulse (Active low)BS1 PD4 IXA0 PD5 I XTAL Action Bit 0XA1 PD6 I XTAL Action Bit 1PAGEL PD7 IBS2 PC2 IByte Select 1 (“0” selects Low byte, “1” selectsHigh byte)Program memory and EEPROM Data PageLoadByte Select 2 (“0” selects Low byte, “1” selects2’nd High byte)DATA {PC[1:0]: PB[5:0]} I/O Bi-directional Data bus (Output when OE is low)Table 28-14. Pin Values Used to Enter Programming ModePin Symbol ValuePAGEL Prog_enable[3] 0XA1 Prog_enable[2] 0XA0 Prog_enable[1] 0BS1 Prog_enable[0] 0Table 28-15. XA1 and XA0 CodingXA1 XA0 Action when XTAL1 is Pulsed0 0 Load Flash or EEPROM Address (High or low address byte determined by BS1).0 1 Load Data (High or Low data byte for Flash determined by BS1).1 0 Load Command1 1 No Action, IdleTable 28-16. Command Byte Bit CodingCommand Byte Command Executed1000 0000 Chip Erase0100 0000 Write Fuse bits0010 0000 Write Lock bits0001 0000 Write Flash0001 0001 Write EEPROM8271D–AVR–05/11304