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ATMega chip full datasheet - UCSD Department of Physics

ATMega chip full datasheet - UCSD Department of Physics

ATMega chip full datasheet - UCSD Department of Physics

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ATmega48A/PA/88A/PA/168A/PA/328/PFigure 27-2.Memory SectionsProgram MemoryBOOTSZ = '11'0x0000Program MemoryBOOTSZ = '10'0x0000No Read-While-Write Section Read-While-Write SectionNo Read-While-Write Section Read-While-Write SectionApplication Flash SectionApplication Flash SectionBoot Loader Flash SectionProgram MemoryBOOTSZ = '01'Application Flash SectionApplication Flash SectionBoot Loader Flash SectionEnd RWWStart NRWWEnd ApplicationStart Boot LoaderFlashend0x0000End RWWStart NRWWEnd ApplicationStart Boot LoaderFlashendNo Read-While-Write Section Read-While-Write SectionNo Read-While-Write Section Read-While-Write SectionApplication Flash SectionApplication Flash SectionBoot Loader Flash SectionProgram MemoryBOOTSZ = '00'Application Flash SectionBoot Loader Flash SectionEnd RWWStart NRWWEnd ApplicationStart Boot LoaderFlashend0x0000End RWW, End ApplicationStart NRWW, Start Boot LoaderFlashendNote: 1. The parameters in the figure above are given in Table 27-7 on page 292.27.5 Boot Loader Lock BitsIf no Boot Loader capability is needed, the entire Flash is available for application code. TheBoot Loader has two separate sets <strong>of</strong> Boot Lock bits which can be set independently. This givesthe user a unique flexibility to select different levels <strong>of</strong> protection.The user can select:• To protect the entire Flash from a s<strong>of</strong>tware update by the MCU.• To protect only the Boot Loader Flash section from a s<strong>of</strong>tware update by the MCU.• To protect only the Application Flash section from a s<strong>of</strong>tware update by the MCU.• Allow s<strong>of</strong>tware update in the entire Flash.See Table 27-2 and Table 27-3 for further details. The Boot Lock bits can be set in s<strong>of</strong>tware andin Serial or Parallel Programming mode, but they can be cleared by a Chip Erase commandonly. The general Write Lock (Lock Bit mode 2) does not control the programming <strong>of</strong> the Flashmemory by SPM instruction. Similarly, the general Read/Write Lock (Lock Bit mode 1) does notcontrol reading nor writing by LPM/SPM, if it is attempted.8271D–AVR–05/11283

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