ATMega chip full datasheet - UCSD Department of Physics

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ATmega48A/PA/88A/PA/168A/PA/328/Parchitecture is more code efficient while achieving throughputs up to ten times faster than conventionalCISC microcontrollers.The ATmega48A/PA/88A/PA/168A/PA/328/P provides the following features: 4K/8Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 256/512/512/1KbytesEEPROM, 512/1K/1K/2Kbytes SRAM, 23 general purpose I/O lines, 32 general purpose workingregisters, three flexible Timer/Counters with compare modes, internal and externalinterrupts, a serial programmable USART, a byte-oriented 2-wire Serial Interface, an SPI serialport, a 6-channel 10-bit ADC (8 channels in TQFP and QFN/MLF packages), a programmableWatchdog Timer with internal Oscillator, and five software selectable power saving modes. TheIdle mode stops the CPU while allowing the SRAM, Timer/Counters, USART, 2-wire Serial Interface,SPI port, and interrupt system to continue functioning. The Power-down mode saves theregister contents but freezes the Oscillator, disabling all other chip functions until the next interruptor hardware reset. In Power-save mode, the asynchronous timer continues to run, allowingthe user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reductionmode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimizeswitching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator isrunning while the rest of the device is sleeping. This allows very fast start-up combined with lowpower consumption.Atmel ® offers the QTouch ® library for embedding capacitive touch buttons, sliders and wheelsfunctionality into AVR ® microcontrollers. The patented charge-transfer signal acquisition offersrobust sensing and includes fully debounced reporting of touch keys and includes Adjacent KeySuppression ® (AKS) technology for unambiguous detection of key events. The easy-to-useQTouch Suite toolchain allows you to explore, develop and debug your own touch applications.The device is manufactured using Atmel’s high density non-volatile memory technology. TheOn-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPIserial interface, by a conventional non-volatile memory programmer, or by an On-chip Boot programrunning on the AVR core. The Boot program can use any interface to download theapplication program in the Application Flash memory. Software in the Boot Flash section willcontinue to run while the Application Flash section is updated, providing true Read-While-Writeoperation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on amonolithic chip, the Atmel ATmega48A/PA/88A/PA/168A/PA/328/P is a powerful microcontrollerthat provides a highly flexible and cost effective solution to many embedded control applications.The ATmega48A/PA/88A/PA/168A/PA/328/P AVR is supported with a full suite of program andsystem development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators,In-Circuit Emulators, and Evaluation kits.2.2 Comparison Between ProcessorsThe ATmega48A/PA/88A/PA/168A/PA/328/P differ only in memory sizes, boot loader support,and interrupt vector sizes. Table 2-1 summarizes the different memory and interrupt vector sizesfor the devices.Table 2-1.Memory Size SummaryDevice Flash EEPROM RAM Interrupt Vector SizeATmega48A 4KBytes 256Bytes 512Bytes 1 instruction word/vectorATmega48PA 4KBytes 256Bytes 512Bytes 1 instruction word/vectorATmega88A 8KBytes 512Bytes 1KBytes 1 instruction word/vector8271D–AVR–05/116
ATmega48A/PA/88A/PA/168A/PA/328/PTable 2-1.Memory Size Summary (Continued)Device Flash EEPROM RAM Interrupt Vector SizeATmega88PA 8KBytes 512Bytes 1KBytes 1 instruction word/vectorATmega168A 16KBytes 512Bytes 1KBytes 2 instruction words/vectorATmega168PA 16KBytes 512Bytes 1KBytes 2 instruction words/vectorATmega328 32KBytes 1KBytes 2KBytes 2 instruction words/vectorATmega328P 32KBytes 1KBytes 2KBytes 2 instruction words/vectorATmega48A/PA/88A/PA/168A/PA/328/P support a real Read-While-Write Self-Programmingmechanism. There is a separate Boot Loader Section, and the SPM instruction can only executefrom there. In ATmega 48A/48PA there is no Read-While-Write support and no separate BootLoader Section. The SPM instruction can execute from the entire Flash.8271D–AVR–05/117
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Atmel Corporation2325 Orchard Parkw
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ATMega chip full datasheet - UCSD Department of Physics

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