ATMega chip full datasheet - UCSD Department of Physics

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ATmega48A/PA/88A/PA/168A/PA/328/Pis requested. The Slave may continue to place new data to be sent into SPDR before readingthe incoming data. The last incoming byte will be kept in the Buffer Register for later use.Figure 19-2.SPI Master-slave InterconnectionSHIFTENABLEThe system is single buffered in the transmit direction and double buffered in the receive direction.This means that bytes to be transmitted cannot be written to the SPI Data Register beforethe entire shift cycle is completed. When receiving data, however, a received character must beread from the SPI Data Register before the next character has been completely shifted in. Otherwise,the first byte is lost.In SPI Slave mode, the control logic will sample the incoming signal of the SCK pin. To ensurecorrect sampling of the clock signal, the minimum low and high periods should be:Low periods: Longer than 2 CPU clock cycles.High periods: Longer than 2 CPU clock cycles.When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overriddenaccording to Table 19-1 on page 170. For more details on automatic port overrides, refer to”Alternate Port Functions” on page 82.Table 19-1.SPI Pin Overrides (Note:)Pin Direction, Master SPI Direction, Slave SPIMOSI User Defined InputMISO Input User DefinedSCK User Defined InputSS User Defined InputNote: See ”Alternate Functions of Port B” on page 84 for a detailed description of how to define thedirection of the user defined SPI pins.The following code examples show how to initialize the SPI as a Master and how to perform asimple transmission. DDR_SPI in the examples must be replaced by the actual Data DirectionRegister controlling the SPI pins. DD_MOSI, DD_MISO and DD_SCK must be replaced by theactual data direction bits for these pins. E.g. if MOSI is placed on pin PB5, replace DD_MOSIwith DDB5 and DDR_SPI with DDRB.8271D–AVR–05/11170
ATmega48A/PA/88A/PA/168A/PA/328/PAssembly Code Example (1)SPI_MasterInit:; Set MOSI and SCK output, all others inputldi r17,(1
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ATMega chip full datasheet - UCSD Department of Physics

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