ATMega chip full datasheet - UCSD Department of Physics

ATmega48A/PA/88A/PA/168A/PA/328/P18 8-bit Timer/Counter2 with PWM and Asynchronous Operation ...... 14618.1Features ..............................................................................................................14618.2Overview .............................................................................................................14618.3Timer/Counter Clock Sources .............................................................................14718.4Counter Unit ........................................................................................................14718.5Output Compare Unit ..........................................................................................14818.6Compare Match Output Unit ................................................................................15018.7Modes of Operation .............................................................................................15118.8Timer/Counter Timing Diagrams .........................................................................15518.9Asynchronous Operation of Timer/Counter2 .......................................................15718.10Timer/Counter Prescaler ...................................................................................15818.11Register Description ..........................................................................................16019 SPI – Serial Peripheral Interface ......................................................... 16819.1Features ..............................................................................................................16819.2Overview .............................................................................................................16819.3SS Pin Functionality ............................................................................................17319.4Data Modes .........................................................................................................17319.5Register Description ............................................................................................17520 USART0 ................................................................................................. 17820.1Features ..............................................................................................................17820.2Overview .............................................................................................................17820.3Clock Generation .................................................................................................17920.4Frame Formats ....................................................................................................18220.5USART Initialization ............................................................................................18420.6Data Transmission – The USART Transmitter ....................................................18520.7Data Reception – The USART Receiver .............................................................18820.8Asynchronous Data Reception ............................................................................19220.9Multi-processor Communication Mode ................................................................19520.10Examples of Baud Rate Setting ........................................................................19620.11Register Description ..........................................................................................20121 USART in SPI Mode ............................................................................. 20621.1Features ..............................................................................................................20621.2Overview .............................................................................................................20621.3Clock Generation .................................................................................................20621.4SPI Data Modes and Timing ...............................................................................2078271D–AVR–05/11iv