ATMega chip full datasheet - UCSD Department of Physics

ATmega48A/PA/88A/PA/168A/PA/328/PFigure 22-16. Formats and States in the Slave Receiver ModeReception of the ownslave address and one ormore data bytes. All areacknowledgedS SLA W A DATA ADATAAP or S$60 $80$80 $A0Last data byte receivedis not acknowledgedAP or S$88Arbitration lost as masterand addressed as slaveA$68Reception of the general calladdress and one or more databytesGeneral CallA DATA ADATAAP or S$70 $90$90 $A0Last data byte received isnot acknowledgedAP or S$98Arbitration lost as master andaddressed as slave by general callA$78From master to slaveDATAAAny number of data bytesand their associated acknowledge bitsFrom slave to masternThis number (contained in TWSR) correspondsto a defined state of the 2-Wire Serial Bus. Theprescaler bits are zero or masked to zero22.7.4 Slave Transmitter ModeIn the Slave Transmitter mode, a number of data bytes are transmitted to a Master Receiver(see Figure 22-17). All the status codes mentioned in this section assume that the prescaler bitsare zero or are masked to zero.Figure 22-17. Data Transfer in Slave Transmitter ModeV CCDevice 1SLAVETRANSMITTERDevice 2MASTERRECEIVERDevice 3........ Device n R1 R2SDASCL8271D–AVR–05/11238