ATMega chip full datasheet - UCSD Department of Physics

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ATmega48A/PA/88A/PA/168A/PA/328/PFigure 18-9. Timer/Counter Timing Diagram, with Prescaler (f clk_I/O /8)clk I/Oclk Tn(clk I/O/8)TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1TOVnFigure 18-10 shows the setting of OCF2A in all modes except CTC mode.Figure 18-10. Timer/Counter Timing Diagram, Setting of OCF2A, with Prescaler (f clk_I/O /8)clk I/Oclk Tn(clk I/O /8)TCNTnOCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2OCRnxOCRnx ValueOCFnxFigure 18-11 shows the setting of OCF2A and the clearing of TCNT2 in CTC mode.Figure 18-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Prescaler(f clk_I/O /8)clk I/Oclk Tn(clk I/O /8)TCNTn(CTC)TOP - 1 TOP BOTTOM BOTTOM + 1OCRnxTOPOCFnx8271D–AVR–05/11156
ATmega48A/PA/88A/PA/168A/PA/328/P18.9 Asynchronous Operation of Timer/Counter2When Timer/Counter2 operates asynchronously, some considerations must be taken.• Warning: When switching between asynchronous and synchronous clocking ofTimer/Counter2, the Timer Registers TCNT2, OCR2x, and TCCR2x might be corrupted. A safeprocedure for switching clock source is:a. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2.b. Select clock source by setting AS2 as appropriate.c. Write new values to TCNT2, OCR2x, and TCCR2x.d. To switch to asynchronous operation: Wait for TCN2xUB, OCR2xUB, and TCR2xUB.e. Clear the Timer/Counter2 Interrupt Flags.f. Enable interrupts, if needed.• The CPU main clock frequency must be more than four times the Oscillator frequency.• When writing to one of the registers TCNT2, OCR2x, or TCCR2x, the value is transferred to atemporary register, and latched after two positive edges on TOSC1. The user should not writea new value before the contents of the temporary register have been transferred to itsdestination. Each of the five mentioned registers have their individual temporary register, whichmeans that e.g. writing to TCNT2 does not disturb an OCR2x write in progress. To detect that atransfer to the destination register has taken place, the Asynchronous Status Register – ASSRhas been implemented.• When entering Power-save or ADC Noise Reduction mode after having written to TCNT2,OCR2x, or TCCR2x, the user must wait until the written register has been updated ifTimer/Counter2 is used to wake up the device. Otherwise, the MCU will enter sleep modebefore the changes are effective. This is particularly important if any of the Output Compare2interrupt is used to wake up the device, since the Output Compare function is disabled duringwriting to OCR2x or TCNT2. If the write cycle is not finished, and the MCU enters sleep modebefore the corresponding OCR2xUB bit returns to zero, the device will never receive acompare match interrupt, and the MCU will not wake up.• If Timer/Counter2 is used to wake the device up from Power-save or ADC Noise Reductionmode, precautions must be taken if the user wants to re-enter one of these modes: If reenteringsleep mode within the TOSC1 cycle, the interrupt will immediately occur and thedevice wake up again. The result is multiple interrupts and wake-ups within one TOSC1 cyclefrom the first interrupt. If the user is in doubt whether the time before re-entering Power-save orADC Noise Reduction mode is sufficient, the following algorithm can be used to ensure thatone TOSC1 cycle has elapsed:a. Write a value to TCCR2x, TCNT2, or OCR2x.b. Wait until the corresponding Update Busy Flag in ASSR returns to zero.c. Enter Power-save or ADC Noise Reduction mode.• When the asynchronous operation is selected, the 32.768kHz Oscillator for Timer/Counter2 isalways running, except in Power-down and Standby modes. After a Power-up Reset or wakeupfrom Power-down or Standby mode, the user should be aware of the fact that this Oscillatormight take as long as one second to stabilize. The user is advised to wait for at least onesecond before using Timer/Counter2 after power-up or wake-up from Power-down or Standbymode. The contents of all Timer/Counter2 Registers must be considered lost after a wake-upfrom Power-down or Standby mode due to unstable clock signal upon start-up, no matterwhether the Oscillator is in use or a clock signal is applied to the TOSC1 pin.8271D–AVR–05/11157
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Atmel Corporation2325 Orchard Parkw
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ATMega chip full datasheet - UCSD Department of Physics

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