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Electrical characteristicsSTM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RDFigure 30.ADC accuracy characteristics4095409440937654321V[1LSB REF+IDEAL =4096E OV(or DDAdepending on package)]4096E T1LSB IDEAL(2)E L(3)E D(1)E G(1) Example of an actual transfer curve(2) The ideal transfer curve(3) End point correlation lineE T =Total Unadjusted Error: maximum deviationbetween the actual and the ideal transfer curves.E O =Offset Error: deviation between the first actualtransition and the first ideal one.E G =Gain Error: deviation between the last idealtransition and the last actual one.E D =Differential Linearity Error: maximum deviationbetween actual steps and the ideal one.E L =Integral Linearity Error: maximum deviationbetween any actual transition and the end pointcorrelation line.0V SSA1 2 3 4 5 6 7 4093 4094 4095 4096V DDAai14395bFigure 31.Typical connection diagram using the ADC 1. Refer to Table 59 for the values of R AIN , R ADC and C ADC .2. C parasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus thepad capacitance (roughly 7 pF). A high C parasitic value will downgrade conversion accuracy. To remedythis, f ADC should be reduced.104/124 Doc ID 022268 Rev 2