Ultralow power ARM-based 32-bit MCU with 384 Kbytes Flash ... - Keil

STM32L162VD, STM32L162ZD, STM32L162QD, STM32L162RDElectrical characteristicsTable 34. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings (1)(2)Symbol Parameter Min Max Unitt w(NE) FSMC_NE low time TBD TBD nst v(NOE_NE) FSMC_NEx low to FSMC_NOE low TBD TBD nst w(NOE) FSMC_NOE low time TBD TBD nst h(NE_NOE) FSMC_NOE high to FSMC_NE high hold time TBD nst v(A_NE) FSMC_NEx low to FSMC_A valid 0 nst h(A_NOE) Address hold time after FSMC_NOE high TBD nst v(BL_NE) FSMC_NEx low to FSMC_BL valid 0 nst h(BL_NOE) FSMC_BL hold time after FSMC_NOE high 0 nst su(Data_NE) Data to FSMC_NEx high setup time TBD nst su(Data_NOE) Data to FSMC_NOEx high setup time TBD nst h(Data_NOE) Data hold time after FSMC_NOE high 0 nst h(Data_NE) Data hold time after FSMC_NEx high 0 nst v(NADV_NE) FSMC_NEx low to FSMC_NADV low 5 nst w(NADV) FSMC_NADV low time TBD ns1. C L = 15 pF.2. Preliminary values.Figure 16.Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveformsFSMC_NExFSMC_NOEt v(NWE_NE)t w(NWE)t h(NE_NWE)FSMC_NWEt v(A_NE)t h(A_NWE)FSMC_A[25:0]Addresst v(BL_NE)t h(BL_NWE)FSMC_NBL[1:0]NBLt h(Data_NWE)t v(Data_NE)t w(NE)ai14990FSMC_D[15:0]t v(NADV_NE)DataFSMC_NADV (1)t w(NADV)1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.Doc ID 022268 Rev 2 77/124