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Practical_modern_SCADA_protocols_-_dnp3,_60870-5_and_Related_Systems

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400 <strong>Practical</strong> Modern <strong>SCADA</strong> Protocols: DNP3, <strong>60870</strong>.5 <strong>and</strong> <strong>Related</strong> <strong>Systems</strong><br />

E-1 Digital circuit operating at 2048 Mbps. Corresponds to<br />

30-channels in the European digital hierarchy.<br />

EBCDIC<br />

EDAC<br />

EEPROM<br />

EIA<br />

EIA-232-C<br />

EIA-422<br />

EIA-423<br />

EIA-449<br />

EIA-485<br />

EISA<br />

EMI/RFI<br />

EMS<br />

Encoder<br />

EPROM<br />

Equalizer<br />

Error rate<br />

Extended Binary Coded Decimal Interchange Code. An eightbit<br />

character code used primarily in IBM equipment. The code<br />

allows for 256 different bit patterns.<br />

Error Detection <strong>and</strong> Correction.<br />

Electrically Erasable Programmable Read Only Memory.<br />

Non-volatile memory in which individual locations can be<br />

erased <strong>and</strong> re-programmed.<br />

Electronic Industries Association. A st<strong>and</strong>ards organization<br />

in the USA specializing in the electrical <strong>and</strong> functional<br />

characteristics of interface equipment.<br />

Interface between DTE <strong>and</strong> DCE, employing serial binary<br />

data exchange. Typical maximum specifications are 15 m at<br />

19200 baud.<br />

Interface between DTE <strong>and</strong> DCE employing the electrical<br />

characteristics of balanced voltage interface circuits.<br />

Interface between DTE <strong>and</strong> DCE, employing the electrical<br />

characteristics of unbalanced voltage digital interface circuits.<br />

General-purpose 37-pin <strong>and</strong> 9-pin interface for DCE <strong>and</strong> DTE<br />

employing serial binary interchange.<br />

The recommended st<strong>and</strong>ard of the EIA that specifies the<br />

electrical characteristics of drivers <strong>and</strong> receivers for use in<br />

balanced digital multi-point systems.<br />

Enhanced Industry St<strong>and</strong>ard Architecture.<br />

Electromagnetic Interference/Radio Frequency Interference.<br />

‘Background noise’ that could modify or destroy data<br />

transmission.<br />

Exp<strong>and</strong>ed Memory Specification.<br />

The activation of a function of a device by a defined signal.<br />

A circuit which changes a given signal into a coded<br />

combination for purposes of optimum transmission of the<br />

signal.<br />

Erasable Programmable Read Only Memory. Non-volatile<br />

semiconductor memory that is erasable in ultra violet light <strong>and</strong><br />

re-programmable.<br />

The device that compensates for the unequal gain characteristic<br />

of the signal received.<br />

The ratio of the average number of bits that will be corrupted<br />

to the total number of bits that are transmitted for a data link or<br />

system.

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