J-Link / J-Trace User Guide (UM08001) - Microcontrollers

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6 Revision Date By Explanation 38 080618 AG 37 080617 AG 36 080530 AG 35 080215 AG 34 080212 AG 33 080207 AG 32 0080129 SK 31 0080103 SK 30 071211 AG 29 070912 SK 28 070912 SK Chapter "Support and FAQs" Section "Frequently Asked Questions" updated Chapter "Reset strategies" Section "Cortex-M3 specific reset strategies" updated. Chapter "Reset strategies" Section "Cortex-M3 specific reset strategies" updated. Chapter "Hardware" Section "Differences between different versions" updated. Chapter "Working with J-Link and J-Trace" Section "Cortex-M3 specific reset strategies" added. Chapter "J-Link and J-Trace related software" Section "J-Link software and documentation package in detail" updated. Chapter "J-Link and J-Trace related software" Section "J-Link TCP/IP Server (Remote J-Link / J-Trace use)" updated. Chapter "Working with J-Link and J-Trace" Section "Command strings" updated. Chapter "Flash download and flash breakpoints" Section "Introduction" updated. Section "Licensing" updated. Section "Using flash download and flash breakpoints with different debuggers" updated. Chapter "Flash download and flash breakpoints" added Chapter "Device specifics:" Section "ATMEL - AT91SAM7 - Recommended init sequence" added. Chapter "Device specifics": Section "NXP - LPC - Fast GPIO bug" list of device enhanced. Chapter "Device specifics": Section "NXP - LPC - Fast GPIO bug" updated. Chapter "Device specifics": Section "Analog Devices" updated. Section "ATMEL" updated. Section "Freescale" added. Section "Luminary Micro" added. Section "NXP" updated. Section "OKI" added. Section "ST Microelectronics" updated. Section "Texas Instruments" updated. Chapter "Related software": Section "J-Link STR91x Commander" updated Chapter "Hardware", section "Target board design" updated. Chapter "Related software": Section "J-LinkSTR91x Commander" added. Chapter "Device specifics": Section "ST Microelectronics" added. Section "Texas Instruments" added. Subsection "AT91SAM9" added. J-Link / J-Trace (UM08001) © 2004-2010 SEGGER Microcontroller GmbH & Co. KG
Revision Date By Explanation 28 070912 AG 27 070827 TQ 26 070710 SK 25 070516 SK 24 070323 SK 23 070320 SK 22 070316 SK 21 070312 SK 20 070307 SK 19 070226 SK 18 070221 SK 17 070131 SK 16 061222 SK 15 060914 OO 14 060818 TQ 13 060711 OO 12 060628 OO Chapter "Working with J-Link/J-Trace": Section "Command strings" updated. Chapter "Working with J-Link/J-Trace": Section "Command strings" updated. Chapter "Introduction": Section "Features of J-Link" updated. Chapter "Background Information": Section "Embedded Trace Macrocell" added. Section "Embedded Trace Buffer" added. Chapter "Working with J-Link/J-Trace": Section "Reset strategies in detail" - "Software, for Analog Devices ADuC7xxx MCUs" updated - "Software, for ATMEL AT91SAM7 MCUs" added. Chapter "Device specifics" Section "Analog Devices" added. Section "ATMEL" added. Chapter "Setup": "Uninstalling the J-Link driver" updated. "Supported ARM cores" updated. Chapter "Hardware": "Using the JTAG connector with SWD" updated. Chapter "Hardware": "Using the JTAG connector with SWD" added. Chapter "Hardware": "Differences between different versions" supplemented. Chapter "J-Link / J-Trace related software": "J-Link GDB Server" licensing updated. Chapter "J-Link / J-Trace related software" updated and reorganized. Chapter "Hardware" "List of OEM products" updated Chapter "Device specifics" added Subchapter "Command strings" added Chapter "Hardware": "Version 5.3": Current limits added "Version 5.4" added Chapter "Setup": "Installating the J-Link USB driver" removed. "Installing the J-Link software and documentation pack" added. Subchapter "List of OEM products" updated. "OS support" updated Chapter "Preface": "Company description" added. J-Link picture changed. Subchapter 1.5.1: Added target supply voltage and target supply current to specifications. Subchapter 5.2.1: Pictures of ways to connect J- Trace. Subchapter 4.7 "Using DCC for memory reads" added. Subchapter 5.2.2: Corrected JTAG+Trace connector pinout table. Subchapter 4.1: Added ARM966E-S to List of supported ARM cores. J-Link / J-Trace (UM08001) © 2004-2010 SEGGER Microcontroller GmbH & Co. KG 7
Page 1 and 2: J-Link / J-Trace ARM User guide of
Page 3 and 4: Revision Date By Explanation 86 100
Page 5: Revision Date By Explanation 57 081
Page 9 and 10: About this document This document d
Page 11 and 12: 11 Table of Contents 1 Introduction
Page 13 and 14: 5.5 Multi-core debugging ..........
Page 15 and 16: 10.2.1 Rules for series terminators
Page 17 and 18: Chapter 1 Introduction This chapter
Page 19 and 20: 1.2 Supported OS J-Link/J-Trace can
Page 21 and 22: 1.3.1 Model comparison The followin
Page 23 and 24: LOW level input voltage (V IL ) V I
Page 25 and 26: 1.3.3 J-Link Ultra J-Link Ultra is
Page 27 and 28: • Serial Wire Viewer supported
Page 29 and 30: 1.3.6 J-Trace ARM J-Trace is a JTAG
Page 31 and 32: 1.3.7 J-Trace for Cortex-M3 J-Trace
Page 33 and 34: 1.3.8 Flasher ARM Flasher ARM is a
Page 35 and 36: 1.4 Common features of the J-Link p
Page 37 and 38: 1.6 Supported IDEs J-Link / J-Trace
Page 39 and 40: Chapter 2 Licensing This chapter de
Page 41 and 42: 2.2 Software components requiring a
Page 43 and 44: 2.3.3 Device-based license The devi
Page 45 and 46: 2.4 Legal use of SEGGER J-Link soft
Page 47 and 48: 2.5.3 J-Link Pro J-Link Pro is a JT
Page 49 and 50: 2.6 J-Link OEM versions There are s
Page 51 and 52: 2.6.6 IAR: J-Trace IAR J-Trace is a
Page 53 and 54: 2.8 Illegal Clones Clones are copie
Page 55 and 56: Chapter 3 Setup This chapter descri
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2. The Welcome dialog box is opened
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3.2 Setting up the USB interface Af
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3.3 Uninstalling the J-Link USB dri
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3.4.1.2 Connecting via Ethernet onl
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3.4.2.2 Configuring J-Link via web
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3.5.2 Using the J-Link configurator
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Chapter 4 J-Link and J-Trace relate
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4.1.2 List of additional software p
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4.2.2 SWO Analyzer SWO Analyzer (SW
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4.2.4 J-Link STM32 Commander (Comma
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4.2.6 J-Mem Memory Viewer J-Mem dis
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4.2.8 J-Link RDI (Remote Debug Inte
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4.3 Dedicated flash programming uti
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4.3.5.2 Purchasing the source code
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4.5 Using the J-LinkARM.dll 4.5.1 W
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Chapter 5 Working with J-Link and J
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5.2 Indicators J-Link uses indicato
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5.2.2 Input indicator Some newer J-
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SEGGER J-Flash configuration dialog
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5.3.3 Determining values for scan c
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5.4 SWD interface The J-Link suppor
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5.5 Multi-core debugging J-Link / J
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6. Choose Project|Options and confi
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5.6 Connecting multiple J-Links / J
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5.6.3 Connecting to a J-Link / J-Tr
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5.7.1.2 Settings In the Settings se
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5.7.1.3 Break/Watch In the Break/Wa
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5.7.1.7 SWV In this section SWV inf
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5.8.1.4 Type 3: No reset No reset i
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5.8.2.6 Type 5: Reset core & periph
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5.10 J-Link script files In some si
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Prototype __api__ int JTAG_WriteIR(
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Note: All global variables are trea
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• ARM1176JFS • CORTEX_M0 • CO
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5.11 Command strings The behavior o
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Syntax map exclude - Example This i
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Syntax SetCheckModeAfterRead = 0 |
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5.11.2 Using command strings 5.11.2
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5.12 Switching off CPU clock during
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Chapter 6 Flash download and flash
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6.2 Licensing Some J-Links are avai
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6.3 Supported devices The following
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Manufacturer Device ID Devices Free
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Manufacturer Device ID Devices NXP*
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Manufacturer Device ID Devices ST S
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6.4 Setup for different debuggers (
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Then J-Link / J-Trace has to be sel
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6.5 Setup for different debuggers (
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Chapter 7 Device specifics This cha
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• Analog ADuC7128 • Analog ADuC
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esults. Clearly 1. is the easiest s
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7.3 Freescale J-Link has been teste
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7.4.1 Unlocking LM3Sxxx devices If
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If you experience problems with a p
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7.6 OKI J-Link has been tested with
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If you experience problems with a p
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7.8 Texas Instruments J-Link has be
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Chapter 8 Target interfaces and ada
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Pins 4, 6, 8, 10, 12, 14, 16, 18, 2
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PIN SIGNAL TYPE Description 15 RESE
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8.2 38-pin Mictor JTAG and Trace co
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PIN SIGNAL Description 22 Trace sig
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Parameter Min. Max. Explanation Tsh
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Pins 3, 5, 15, 17, 19 are GND pins
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Chapter 9 Background information Th
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9.1.4 The TAP controller The TAP co
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9.2 Embedded Trace Macrocell (ETM)
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9.2.3.2 Code coverage - Source code
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9.3 Embedded Trace Buffer (ETB) The
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9.4.4.2 JLinkArmFlash.dll - A DLL w
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Use an application (for example JLi
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Chapter 10 Designing the target boa
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10.2 Terminating the trace signal T
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Chapter 11 Support and FAQs This ch
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11.2 Troubleshooting 11.2.1 General
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11.3 Signal analysis The following
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11.5 Frequently Asked Questions Sup
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Chapter 12 Glossary This chapter de
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ID Identifier. IEEE 1149.1 The IEEE
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TDO The electronic signal output fr
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Chapter 13 Literature and reference
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A Adaptive clocking ...............
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J-Link / J-Trace User Guide (UM08001) - Microcontrollers

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