Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...

More documents

Recommendations

Info

Intel ® GW80314 I/O Processor DMA and XOR LibraryLibrary6.0 Library6.1 Ecosystem: Application and XOR/DMA Library APIsAPIs provide the following hardware and software interfaces (Also see Appendix A, “LibraryFlow Charts”).GW80314 Hardware Interfaced:• Intel ® XScale microarchitecture data cache.• Intel ® XScale microarchitecture Page Tables.• DMA/XOR Controller Unit.• MPIC.Library Software Grouped by Category:• Initialization— Hardware— Descriptor Management Data Structures• Operations— DMA/XOR Descriptor Management: requests, descriptor reclamation— DMA and XOR transaction initialization (posting)— Interrupt handling• Termination— Free Memory22 APIs and Testbench White Paper
Intel ® GW80314 I/O Processor DMA and XOR LibraryLibrary6.1.1 Flow Sequence Description: XOR and DMA Library6.1.1.1 Initializationlib_mem_map_malloc()lib_set_xcb_mem_range()lib_new_mgr()lib_init()callintHandlerAttach()mpic_setup()Allocates separate memory regions for XOR descriptors, DMAdescriptors and Data. Records memory map to data structureMemmap_Typemem_map;Sets xcb bits for address range. This is used in conjunction with globalvariable mem_map to set descriptor and data address ranges.Allocates memory for XorDma_80314_Type data structure.Initialize XorDma_80314_Type data structure. The Free Stacksand Post Queues are initialized.Chains interrupt handlers lib_irq_handler() and lib_fiq_handler() intointerrupt vectors.Called to unmask/mask and route interrupts for DMA and XOR.6.1.1.2 Requestlib_stack_pop() is called to get a aligned buffer from the Free Stack. The alignment allows thesame buffer to be used as a DMA or XOR descriptor.In the case of an append, the descriptor values are written. Then, when the cache policy for thememory region used by the descriptors is either 010, 011 or 111 (caches on), the descriptor needsto be flushed to RAM using a macro. Function lib_postq_append_resume_sram() orlib_postq_append_resume_sdram() are called to append the descriptor to the channel descriptord chain, place in post queue, records to global variable chainTailXORDMA[], then sets resume tostart the transaction.6.1.1.3 Post Transaction CleanupAt some point descriptors for completed transactions must be reclaimed from the Post Queues andreturned to the Free Stack (when append is used). This is accomplished by calling lib_reclaim().APIs and Testbench White Paper 23
Page 1 and 2: Intel ® GW80314 I/O ProcessorDMA a
Page 3 and 4: ContentsContents1.0 Introduction...
Page 5 and 6: ContentsE.2.10 void * lib_q_get(Xor
Page 7 and 8: Revision HistoryRevision HistoryDat
Page 9 and 10: Intel ® GW80314 I/O Processor DMA
Page 21: Intel ® GW80314 I/O Processor DMA
Page 73 and 74:
Intel ® GW80314 I/O Processor DMA
Page 75 and 76:
Page 77 and 78:
Page 79 and 80:
Page 81 and 82:
Page 83 and 84:
Page 85 and 86:
Page 87 and 88:
Page 89 and 90:
show all

Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?