Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...

ContentsContents1.0 Introduction....................................................................................................................................91.1 Demonstrate Libraries Testbench Menu...............................................................................91.1.1 Description of Demonstration Cases .......................................................................92.0 Library Functional Overview ......................................................................................................102.1 Library Usage Models.........................................................................................................103.0 Intel ® GW80314 I/O Processor Component Overview..............................................................113.1 Data Paths and Components..............................................................................................113.1.1 Function .................................................................................................................113.2 DMA/XOR Block .................................................................................................................133.2.1 Overview................................................................................................................133.2.2 DMA/XOR Features...............................................................................................143.2.3 Memory: SRAM and SDRAM.................................................................................153.3 Intel ® XScale Microarchitecture .......................................................................................153.3.1 Overview................................................................................................................153.3.2 Intel ® XScale Microarchitecture Memory Management ......................................163.3.3 Interrupt Controller.................................................................................................173.3.4 Data Cache............................................................................................................174.0 Data Cache Policy Mechanics ....................................................................................................184.1 Introduction .........................................................................................................................184.2 Page Tables........................................................................................................................184.3 Data Cache and Write Policy..............................................................................................205.0 Optimization of Descriptor Processing Software.....................................................................216.0 Library ..........................................................................................................................................226.1 Ecosystem: Application and XOR/DMA Library APIs .........................................................226.1.1 Flow Sequence Description: XOR and DMA Library .............................................236.1.1.1 Initialization ............................................................................................236.1.1.2 Request..................................................................................................236.1.1.3 Post Transaction Cleanup......................................................................236.1.1.4 Terminate...............................................................................................246.1.2 Redboot* Intel ® IQGW80314 SV Board Memory Map...........................................257.0 Library and Test Bench File Organizationand Compilation ..........................................................................................................................267.1 Folder and File Organization ..............................................................................................267.1.1 / Files: ....................................................................................................................267.1.2 /Lib Files: ...............................................................................................................267.1.3 /Bench Files: ..........................................................................................................277.2 Instruction to Build and Run................................................................................................278.0 General Notes ..............................................................................................................................288.1 Cache Implications Using Append Resume Macros...........................................................288.2 GCSR is used to set Descriptor Completion Interrupts ......................................................288.3 Using Resume ....................................................................................................................28APIs and Testbench White Paper 3