Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...
Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...
Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...
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<strong>Intel</strong> ® GW80314 I/O <strong>Processor</strong> <strong>DMA</strong> <strong>and</strong> <strong>XOR</strong> <strong>Library</strong><strong>Library</strong> Flow ChartsAppendix A <strong>Library</strong> Flow ChartsBench80314 <strong>DMA</strong>/<strong>XOR</strong> <strong>Library</strong> Demo Block Diagram<strong>Library</strong>Buffer Manager XScale <strong>DMA</strong>/<strong>XOR</strong> Engine InterruptStart(1) Allocate 4 ChannelQueue/Stack ContainerXorDma_80314_TypeInitialize <strong>Library</strong>(2) Setup memorymap for descriptorprocessing/data(3) Chain ininterrupt h<strong>and</strong>lers<strong>and</strong> unmaskSelect MenuOptionSetup Demo(5) Allocate buffers <strong>and</strong>initializeXorDma_80314_Type(4) Set descriptorprocessing areaDcache Policy(5) Initialize four<strong>DMA</strong>/<strong>XOR</strong>Channels withinitial descriptorInterate throughdescriptors(6) Get descriptor<strong>and</strong> complete ifempty reclaimdescriptors(7) Appendresume <strong>and</strong> setinterrupt(8) Count <strong>DMA</strong>/<strong>XOR</strong> interrupts inh<strong>and</strong>lerValidate Transfer<strong>and</strong> CRC32End32 <strong>APIs</strong> <strong>and</strong> Testbench White Paper
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