Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...
Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...
Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...
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<strong>Intel</strong> ® GW80314 I/O <strong>Processor</strong> <strong>DMA</strong> <strong>and</strong> <strong>XOR</strong> <strong>Library</strong><strong>DMA</strong><strong>XOR</strong>80314.h#define OFFSET(CH)(((unsigned long)CH) * ((unsigned long)0x100))#define CH_SRC_ADDR_M(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC_ADDR_M + OFFSET(CH))#define CH_SRC_ADDR_L(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC_ADDR_L + OFFSET(CH))#define CH_DST_ADDR_M(CH)(volatile unsigned long *)((unsigned long)CH0_DST_ADDR_M +OFFSET(CH))#define CH_DST_ADDR_L(CH)(volatile unsigned long *)((unsigned long)CH0_DST_ADDR_L +OFFSET(CH))#define CH_TCR1(CH) (volatile unsigned long *)((unsigned long)CH0_TCR1 + OFFSET(CH))#define CH_TCR2(CH) (volatile unsigned long *)((unsigned long)CH0_TCR2 + OFFSET(CH))#define CH_ND_ADDR_M(CH)(volatile unsigned long *)((unsigned long)CH0_ND_ADDR_M +OFFSET(CH))#define CH_ND_ADDR_L(CH)(volatile unsigned long *)((unsigned long)CH0_ND_ADDR_L +OFFSET(CH))#define CH_ND_TCR(CH)(volatile unsigned long *)((unsigned long)CH0_ND_TCR +OFFSET(CH))#define CH_GCSR(CH) (volatile unsigned long *)((unsigned long)CH0_GCSR + OFFSET(CH))#define CH_CRC_ADDR_M(CH)(volatile unsigned long *)((unsigned long)CH0_CRC_ADDR_M +OFFSET(CH))#define CH_CRC_ADDR_L(CH)(volatile unsigned long *)((unsigned long)CH0_CRC_ADDR_L +OFFSET(CH))#define CH_CRC(CH)(volatile unsigned long *)((unsigned long)CH0_CRC + OFFSET(CH))#define CH_SRC01_ADDR_M(CH) (volatile unsigned long *)((unsignedlong)CH0_SRC01_ADDR_M + OFFSET(CH))#define CH_SRC01_ADDR_L(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC01_ADDR_L + OFFSET(CH))#define CH_SRC02_ADDR_M(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC02_ADDR_M + OFFSET(CH))#define CH_SRC02_ADDR_L(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC02_ADDR_L + OFFSET(CH))#define CH_SRC03_ADDR_M(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC03_ADDR_M + OFFSET(CH))#define CH_SRC03_ADDR_L(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC03_ADDR_L + OFFSET(CH))#define CH_SRC04_ADDR_M(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC04_ADDR_M + OFFSET(CH))#define CH_SRC04_ADDR_L(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC04_ADDR_L + OFFSET(CH))#define CH_SRC05_ADDR_M(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC05_ADDR_M + OFFSET(CH))#define CH_SRC05_ADDR_L(CH)(volatile unsigned long *)((unsignedlong)CH0_SRC05_ADDR_L + OFFSET(CH))<strong>APIs</strong> <strong>and</strong> Testbench White Paper 53
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