Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...

Intel ® GW80314 I/O Processor DMA and XOR LibraryLibrary Function PrototypesItemDescriptionOutputPurposeOperationNoneTo set the data cache policy (xcb bits) for the memory range after cleaning and invalidatesthe data cache.• Cleans and invalidates the full data cache• Interacted through the pages within the address range• For each page sets the data policy per input parameter xcb• Invalidates the data TLBsE.1.4Page_Type lib_get_page_attributes(unsigned long virt_addr)ItemPrototypeInputOutputPurposeOperationDescriptionPage_Type lib_get_page_attributes(unsigned long virt_addr);Virtual memory addressPage_Type that provides: page_size, page_xcb = current cache policy (xcb bits), base_loc =page boundary prior to virt_addrObtain attributes of page that includes the input parameter address. Attributes include pagesize, lower page boundary and cache policy.Function calls lib_set_page_xcb with input parameter that does not change the state of thepage tablesE.1.5Page_Type lib_set_page_xcb(unsigned long base,unsigned int xcb)ItemPrototypeInputOutputPurposeOperationDescriptionPage_Type lib_set_page_xcb(unsigned long base, unsigned int xcb);base: address on page in whichxcb: cache policy. Bit 2==x bit, bit 1: c== bit and bit 0==b bitPage_Type that provides: page_size, page_xcb = current cache policy (xcb bits), base_loc =page boundary prior to virt_addrSets the cache policy for the page including the input parameter address.• Before calling: data cache should be cleaned and invalidated• After calling: Data TLB needs to be invalicated.lFunction sets the xcb bits in the page table using the Translation Process algorithm per theARM Architecture Manual page b3-6 to and the bit definitions per the Intel ® XScale Microarchitecture Programmer’s Reference Manual.70 APIs and Testbench White Paper