Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...

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Intel ® GW80314 I/O Processor DMA and XOR Librarydmaxor_desc_mgr.hshort csr; /* CSR value */short mark; /* If != 0 then executed*/unsigned longpad[23];//Now 256 bytes or 64 byte//for 64 word alignment.}Xor_Frame_Type;/* Container designed to be multiples of cacheline (32 bytes).*/typedef struct queue{intintintunsigned longCircQ_Front;CircQ_Length;CircQ_Limit;qty_marked; //Quantity markedunsigned long * pad[4];void * CircQ[QUEUESIZE]; //Channel size s/b mult of 8}Queue_Type;typedef struct stack{intintStack_Length;Stack_Limit;int pad[6]; /* To stay on cacheline. */void* Stack[STACKSIZE];}Stack_Type;/* Structure mapping four Channels to Controller Channels */typedef struct xordma_80314{//ChannelsStack_TypeQueue_TypeFreeStack[NUM_CHANNELS];//4 ChannelsQueue[NUM_CHANNELS];//4 Channels//Put whatever malloced herevoid *toFreedma_80314;}XorDma_80314_Type;/*-----------------------------------------------------------------------------**** M A C R O S66 APIs and Testbench White Paper
Intel ® GW80314 I/O Processor DMA and XOR Librarydmaxor_desc_mgr.h****---------------------------------------------------------------------------*/#define LIB_SAVE_LAST_APPEND(CH,ADDR)(chainTailDMAXOR[CH ] =(void *)ADDR)#define LIB_GET_LAST_APPEND(CH)(chainTailDMAXOR[CH ])/*-----------------------------------------------------------------------------**** P R O T O T Y P E S****---------------------------------------------------------------------------*/// Setup and wrapupXorDma_80314_Type * lib_new_mgr(void);intintvoidlib_buffersize(void);lib_init(XorDma_80314_Type * mgrt , void * desc_baseaddr);lib_free_mgr(XorDma_80314_Type * mgr);// Stack Operationsvoid *Boolchannel);void *lib_stack_pop(XorDma_80314_Type * mgr,enum CHANNEL channel);lib_stack_push(XorDma_80314_Type * mgr, void * frame,enum CHANNELlib_top_of_stack(XorDma_80314_Type * mgr,enum CHANNEL channel);//Queue Operationsintvoid *intchannel);lib_reclaim(XorDma_80314_Type * mgr, enum CHANNEL channel);lib_q_get(XorDma_80314_Type * mgr, enum CHANNEL channel);lib_q_put(XorDma_80314_Type * mgr, void * frame, enum CHANNEL//Post operationsinline int lib_postq_appnd_resume_sdram(XorDma_80314_Type * mgr, void * frame,enumPORT port,enum GCSR_OP_CMD cmd,unsigned int gcsr,enum CHANNEL channel);inline int lib_postq_appnd_resume_sram (XorDma_80314_Type * mgr, void * frame,enumPORT port,enum GCSR_OP_CMD cmd,unsigned int gcsr,enum CHANNEL channel);//Debugging descriptor chainsvoidprintfDMAchain(int channel);APIs and Testbench White Paper 67
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Intel ® GW80314 I/O ProcessorDMA a
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ContentsContents1.0 Introduction...
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ContentsE.2.10 void * lib_q_get(Xor
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Revision HistoryRevision HistoryDat
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Intel(R) IQ80315 I/O Processor DMA and XOR Library APIs and ...

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