1989_MELPS_7700_Software_Manual

Register Configuration
2.7 Data Bank Register (DT)
The data bank register (DT) is an 8-bit register. Its contents are interpreted as the upper 8 bits
(bank) of a 24-bit memory address under certain addressing modes.
2.8 Direct Page Register (DPR)
The direct page register (DPR) is a 16-bit register, which allows specification of a 256 byte space
called a direct page in bank-O. This area can be accessed by 2 bytes in the direct page
addressing mode. The contents of the direct page register specify the least-significant (base)
address of the direct page area. A value in the range of 016-FFFF16 may be set in the direct page
register. When a value of or higher than FF0116 is set in the direct page register, the direct page
area will cross over the bank-O and bank-1 boundary. Normally, the lower 8-bit value of the direct
page register is set to 0016 since that reduces the number of cycles required for address generation.
,....
00000016 00000016
_______ 0000FF16
] When DPR=OOOO ..
,...------- 00012316
8ank-0 '- _ _ _ _ _ _ 00022216
] When DPR=0123 .. (Nole 11
Direct page area D
I-00FFFF16
01000016
,...------- 00FFD616
'- _ _ _ _ _ _
010FD516
] When DPR=FFDS .. (Note 21
8ank-1
I
(Note 1) Cycles-count is incremented by 1 when the lower a-bit of DPR is not 0016.
(Note 2) Direct page is specified across bank-O and bank-1 when DPR value is FF0116 or higher.
Fig. 2.2 Setting Direct Page by Direct Page Register
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