1989_MELPS_7700_Software_Manual

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STAStore Accumulator in MemorySTAOperationWhen m=O,M(n) f- AcclM(n+1) f- AccHWhen m=1M(n) f- AcclDescriptionStores the contents of the accumulator in memory.The contents of the accumulator are not changed.Status flagsNot affected.Addressing mode Syntax Machine codeDirect STA A, dd 8516, ddDirect indexed X STA A, dd, X 9516, ddDirect indirect STA A, (dd) 921~ ddDirect indexed X indirect STA A, (dd, X) 8116, ddDirect indirect indexed Y STA A, (dd), Y 9116, ddDirect indirect long STAL A, (dd) 8716, ddDirect Indirect long indexed Y STAL A, (dd), Y 9716, ddAbsolute STA A, mmll 8D16, II, mmAbsolute indexed X STA A, mmll, X 9D16, II, mmAbsolute indexed Y STA A, mmll, Y 9916, II, mmAbsolute long STA A, hhmmll 8F16, II, mm, hhAbsolute long indexed X STA A, hhmmll, X 9F16, II, mm, hhStack pointer relative STA A, nn, S 8316, nnStack pointer relative STA A, (nn, S), Y 9316, nnindirect indexed YBytes Cycles2 42 52 72 72 72 102 113 53 53 54 64 72 5281(Note1) This table applies when using the accumulator A. If using the accumulator B, replace "A" with "B".In this case, "4216" is added at the beginning of the machine code, the bytes-count increases by 1and the cycles-count increases by 2.139
STPStopSTPOperationDescriptionStop the oscillator.Resets the oscillator controlling flip-flop circuit to inhibit the oscillator. To restartthe oscillator, either an interrupt or reset must be executed.Status flagsNot affected.Addressing mode Syntax Machine code Bytes CyclesImplied STP OB16 1 3140
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MITSUBISHI SEMICONDUCTORSMELPS 7700
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ContentsContents1. Introduction of
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Register Configuration2. Register C
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Register Configuration2.4 Stack Poi
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Register Configuration2.9 Processor
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Addressing Modes3. Addressi ng Mode
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ImmediateModeFunctionImmediate addr
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DirectModeFunctionDirect addressing
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Direct Indexed XModeFunctionDirect
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Direct Indexed YModeFunctionDirect
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D;,rect Indexed X IndirectModeFunct
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Direct Indexed X Indirectex.: Mnemo
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Direct Indirect Indexed Yex.: Mnemo
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Direct Indirect LongModeFunctionDir
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Direct Indirect Long Indexed Yex.:
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AbsoluteModeFunctionAbsolute addres
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Absolute BitModeFunctionAbsolute bi
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Absolute Indexed Xex.: MnemonicAOC
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Absolute Indexed Yex.: MnemonicLOX
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Absolute Long Indexed XModeFunction
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Absolute Indirect LongModeFunctionI
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StackModeFunctionStack addressing m
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RelativeModeFunctionRelative addres
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Direct Bit Relativeex.: Mnemonic Ma
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Absolute Bit Relativeex. : Mnemonic
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Stack Pointer Relative Indirect Ind
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Block TransferModeFunctionBlock tra
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Instructions4. Instructions4.1 Inst
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Instructions4.1.2 Arithmetic Instru
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InstructionsCategory Instruction De
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InstructionsThe table below lists t
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AND logical AND ANDOperation Acc f-
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BBC Branch on Bit Clear BBCOperatio
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BeeBranch on Carry ClearBeeOperatio
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BEQBranch on EqualBEQOperationWhen
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BNEBranch on Not EqualBNEOperationW
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BRABranch AlwaysBRAOperationFor sho
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eveBranch on Overflow CleareveOpera
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CLBClear BitCLBOperationM (- MA IMM
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,Cli Clear Interrupt Disable Status
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CLPClear Processor StatusCLPOperati
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CMP Compare CMPOperationAcc - MDesc
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CpyCompare Memory and Index Registe
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DEXDecrement Index Register X by On
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DIV Divide DIVOperationB(remainder}
Page 93 and 94: EOR Exclusive OR Memory with Accumu
Page 95 and 96: INX Increment Index Register X by O
Page 97 and 98: JMPJumpJMPOperationIf absolute addr
Page 99 and 100: LOA Load Accumulator from Memory LO
Page 101 and 102: LOT Load Immediate to Data Bank Reg
Page 103 and 104: LOYLoad Index Register Y from Memor
Page 105 and 106: MPYMultiplyMPYOperationB, A b A x M
Page 107 and 108: MVP Move Positive MVPOperationMn-k
Page 109 and 110: ORA OR Memory with Accumulator ORAO
Page 111 and 112: PElPush Effective Indirect AddressP
Page 113 and 114: PHAPush Accumulator A on StackPHAOp
Page 115 and 116: PHDOperationPush Direct Page Regist
Page 117 and 118: PHPPush Processor Status on StackPH
Page 119 and 120: PHXPush Index Register X on StackPH
Page 121 and 122: PLAPull Accumulator A from StackPLA
Page 123 and 124: PLDOperationPull Direct Page Regist
Page 125 and 126: PLTPull Data Bank Register from Sta
Page 127 and 128: PLYPull Index Register Y from Stack
Page 129 and 130: PSHPushPSHM(8) f- OPRH8 f- 8-1M(8)
Page 131 and 132: PULPullPULSf- S+1PSL f- M(S)Sf- S+1
Page 133 and 134: ROL Rotate One Bit Left ROLOperatio
Page 135 and 136: RTIReturn from InterruptRTIOperatio
Page 137 and 138: RTSReturn from SubroutineRTSOperati
Page 139 and 140: SEBSet BitSEBOperationM f- M V IMMI
Page 141 and 142: SEI Set Interrupt Disable Status SE
Page 143: SEPSet Processor StatusSEPOperation
Page 147 and 148: STYStore Index Register Y in Memory
Page 149 and 150: lASTransfer Accumulator A to Stack
Page 151 and 152: TAYTransfer Accumulator A to Ind~x
Page 153 and 154: TBSTransfer Accumulator B to Stack
Page 155 and 156: TBvTransfer Accumulator B to Index
Page 157 and 158: TOBTransfer Direct Page Register to
Page 159 and 160: TSBTransfer Stack Pointer to Accumu
Page 161 and 162: TXATransfer Index Register X to Acc
Page 163 and 164: TXSTransfer Index Register X to Sta
Page 165 and 166: TVATransfer Index Register Y to Acc
Page 167 and 168: TYXTransfer Index Register Y to XTY
Page 169 and 170: XABExchange Accumulator A and 8XABO
Page 171 and 172: Notes for Programming(11) The code
Page 173 and 174: Instruction Execution Sequence6.2 C
Page 175 and 176: Instruction Execution SequenceIE)·
Page 177 and 178: Instruction Execution Sequence{Exam
Page 179 and 180: Instruction Execution Sequence(Exam
Page 185 and 186: Instruction Execution SequenceWhen
Page 187 and 188: Instruction Execution SequenceOpera
Page 189 and 190: Instruction Execution SequenceOpera
Page 193 and 194: APPENDIX ACPU Instruction Execution
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ImpliedInstruction :CLC. CLI. CLM.
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ImpliedInstructionR T STiming¢I CP
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ImpliedInstructionBRKTiming00194
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ImmediateInstruction :. L D TTiming
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ImmediateInstructionDIV, MPYTimingr
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DirectInstructionADC, AND, CMP, CPX
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DirectInstructionDIV, MPYTiming~cpu
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Direct Indexed XInstructionADC, AND
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Direct Indexed XInstructionDIV. MPY
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Direct IndirectInstructionADC. AND.
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Direct Indexed X IndirectInstructio
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Direct Indirect Indexed YInstructio
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Direct Indirect LongInstructionADC,
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Direct Indirect Long Indexed YInstr
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AbsoluteInstructionADC, AND, CMP, C
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AbsoluteInstructionDIV, MPYTimingt/
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Absolute BitInstruction : C L B, S
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Absolute Indexed XInstruction : A S
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Absolute Indexed XAbsolute Indexed
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Absolute LongInstructionAD C, AND,
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Absolute LongInstructionJ M PTiming
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Absolute Long Indexed XInstructionD
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Absolute Indirect LongInstructionJ
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StackInstructionPEA. Timing¢CPUAp(
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StackInstructionP H BTiming4tcpuAp(
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StackInstructionPLPTimingAp(cpu)DAT
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StackInstructionPULTimingPSDATA{Cpu
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Direct Bit RelativeInstructionBBG,
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Stack Pointer RelativeInstruction :
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Stack Pointer Relative Indirect Ind
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Block TransferInstructionMVNTimingI
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APPENDIX BSeries MELPS 7700 Machine
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APPENDIX 8Series MELPS 7700 Machine
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APPENDIX CSeries MELPS 7700 Instruc
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APPENDIX CSeries MELPS 7700 Instruc
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MITSUBISHI SEMICONDUCTORSMELPS 7700
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1989_MELPS_7700_Software_Manual

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