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MITSUBISHI SEMICONDUCTORSMELPS 7700
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ContentsContents1. Introduction of
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Register Configuration2. Register C
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Register Configuration2.4 Stack Poi
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Register Configuration2.9 Processor
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Addressing Modes3. Addressi ng Mode
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ImmediateModeFunctionImmediate addr
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DirectModeFunctionDirect addressing
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Direct Indexed XModeFunctionDirect
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Direct Indexed YModeFunctionDirect
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D;,rect Indexed X IndirectModeFunct
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Direct Indexed X Indirectex.: Mnemo
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Direct Indirect Indexed Yex.: Mnemo
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Direct Indirect LongModeFunctionDir
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Direct Indirect Long Indexed Yex.:
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AbsoluteModeFunctionAbsolute addres
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Absolute BitModeFunctionAbsolute bi
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Absolute Indexed Xex.: MnemonicAOC
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Absolute Indexed Yex.: MnemonicLOX
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Absolute Long Indexed XModeFunction
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Absolute Indirect LongModeFunctionI
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StackModeFunctionStack addressing m
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RelativeModeFunctionRelative addres
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Direct Bit Relativeex.: Mnemonic Ma
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Absolute Bit Relativeex. : Mnemonic
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Stack Pointer Relative Indirect Ind
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Block TransferModeFunctionBlock tra
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Instructions4. Instructions4.1 Inst
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Instructions4.1.2 Arithmetic Instru
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InstructionsCategory Instruction De
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InstructionsThe table below lists t
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AND logical AND ANDOperation Acc f-
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BBC Branch on Bit Clear BBCOperatio
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BeeBranch on Carry ClearBeeOperatio
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BEQBranch on EqualBEQOperationWhen
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BNEBranch on Not EqualBNEOperationW
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BRABranch AlwaysBRAOperationFor sho
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eveBranch on Overflow CleareveOpera
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CLBClear BitCLBOperationM (- MA IMM
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,Cli Clear Interrupt Disable Status
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CLPClear Processor StatusCLPOperati
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CMP Compare CMPOperationAcc - MDesc
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CpyCompare Memory and Index Registe
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DEXDecrement Index Register X by On
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DIV Divide DIVOperationB(remainder}
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EOR Exclusive OR Memory with Accumu
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INX Increment Index Register X by O
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JMPJumpJMPOperationIf absolute addr
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LOA Load Accumulator from Memory LO
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LOT Load Immediate to Data Bank Reg
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LOYLoad Index Register Y from Memor
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MPYMultiplyMPYOperationB, A b A x M
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MVP Move Positive MVPOperationMn-k
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ORA OR Memory with Accumulator ORAO
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PElPush Effective Indirect AddressP
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PHAPush Accumulator A on StackPHAOp
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PHDOperationPush Direct Page Regist
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PHPPush Processor Status on StackPH
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PHXPush Index Register X on StackPH
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PLAPull Accumulator A from StackPLA
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PLDOperationPull Direct Page Regist
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PLTPull Data Bank Register from Sta
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PLYPull Index Register Y from Stack
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PSHPushPSHM(8) f- OPRH8 f- 8-1M(8)
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PULPullPULSf- S+1PSL f- M(S)Sf- S+1
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ROL Rotate One Bit Left ROLOperatio
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RTIReturn from InterruptRTIOperatio
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RTSReturn from SubroutineRTSOperati
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SEBSet BitSEBOperationM f- M V IMMI
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SEI Set Interrupt Disable Status SE
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SEPSet Processor StatusSEPOperation
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STPStopSTPOperationDescriptionStop
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STYStore Index Register Y in Memory
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lASTransfer Accumulator A to Stack
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TAYTransfer Accumulator A to Ind~x
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TBSTransfer Accumulator B to Stack
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TBvTransfer Accumulator B to Index
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TOBTransfer Direct Page Register to
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TSBTransfer Stack Pointer to Accumu
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TXATransfer Index Register X to Acc
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TXSTransfer Index Register X to Sta
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TVATransfer Index Register Y to Acc
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TYXTransfer Index Register Y to XTY
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XABExchange Accumulator A and 8XABO
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Notes for Programming(11) The code
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Instruction Execution Sequence6.2 C
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Instruction Execution SequenceIE)·
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Instruction Execution Sequence{Exam
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Instruction Execution Sequence(Exam
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Instruction Execution Sequence(Exam
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Instruction Execution Sequence(Exam
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Instruction Execution SequenceWhen
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Instruction Execution SequenceOpera
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Instruction Execution SequenceOpera
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Instruction Execution Sequence(Exam
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APPENDIX ACPU Instruction Execution
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ImpliedInstruction :CLC. CLI. CLM.
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ImpliedInstructionR T STiming¢I CP
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ImpliedInstructionBRKTiming00194
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ImmediateInstruction :. L D TTiming
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ImmediateInstructionDIV, MPYTimingr
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DirectInstructionADC, AND, CMP, CPX
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DirectInstructionDIV, MPYTiming~cpu
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- Page 227 and 228: Absolute BitInstruction : C L B, S
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- Page 245 and 246: StackInstructionPLPTimingAp(cpu)DAT
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