1989_MELPS_7700_Software_Manual

BBS
Branch on Bit Set
BBS
Operation
When M" IMM=O
PC f-- PC + n ± REL (REL is instruction's second byte)
PG f-- PG + 1 (if carry on PC), PG f-- PG - 1 (if borrow on PC)
When M A IMM~O
PC f-- PC + n
PG (- PG + 1 (if carry on PC)
IMM is the bit pattern that specifies the bit positions to be tested. The value of
n is determined as follows:
If the data length selection flag m is set to 1, n=4 if direct bit relative
addressing mode, and n=5 if absolute bit relative addressing mode.
If the data length selection flag m is set to 0, n=5 if direct bit relative
addressing mode, and n=6 if absolute bit relative addressing mode.
Description
Status flags
The BBS instruction tests the specified bits (which may be specified simultaneously)
of memory. The instruction causes a branch to the specified address
when the specified bits are all 1. The branch address is specified by a relative
address.
Not affected.
Addressing mode Syntax Machine code Bytes Cycles
Direct bit relative BBS #imm, dd, rr 2416, dd, imm, rr 4 7
Absolute bit relative BBS #imm, mmll, rr 2C16, II, mm, imm, rr 5 8
(Note1) The bytes-count increases by 1 when operating on 16-bit data with the data length selection
flag m set to O.
(Note2) The cycles-count increases by 2 when a branch occurs.
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