1989_MELPS_7700_Software_Manual

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WITWaitWITOperationStop the internal clock.DescriptionThe WIT instruction stops the internal clock but not the external clock is notstopped. To restart the internal clock, either an interrupt or reset must beexecuted.Status flagsNot affected.Addressing mode Syntax Machine code Bytes CyclesImplied WIT CB16 1 3163
XABExchange Accumulator A and 8XABOperationIf m=O,If m=1,AL HAH HBLBHAL HBLDescription Swaps the contents of the accumulators A and B.Status flagsIPL :NVmxDIZCNot affected.Set to 1 when bit 15 (or bit 7 if the data length selection flag m is set to 1) ofthe accumulator A after the operation is 1. Otherwise, cleared to O.Not affected.Not affected.Not affected.Not affected.Not affected.Set to 1 when the contents of the accumulator A is cleared to 0 by the operation.Otherwise, cleared to O.Not affected.Addressing mode Syntax Machine code I Bytes CyclesImplied XAB 8916, 2816·126164
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MITSUBISHI SEMICONDUCTORSMELPS 7700
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ContentsContents1. Introduction of
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Register Configuration2. Register C
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Register Configuration2.4 Stack Poi
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Register Configuration2.9 Processor
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Addressing Modes3. Addressi ng Mode
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ImmediateModeFunctionImmediate addr
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DirectModeFunctionDirect addressing
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Direct Indexed XModeFunctionDirect
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Direct Indexed YModeFunctionDirect
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D;,rect Indexed X IndirectModeFunct
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Direct Indexed X Indirectex.: Mnemo
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Direct Indirect Indexed Yex.: Mnemo
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Direct Indirect LongModeFunctionDir
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Direct Indirect Long Indexed Yex.:
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AbsoluteModeFunctionAbsolute addres
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Absolute BitModeFunctionAbsolute bi
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Absolute Indexed Xex.: MnemonicAOC
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Absolute Indexed Yex.: MnemonicLOX
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Absolute Long Indexed XModeFunction
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Absolute Indirect LongModeFunctionI
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StackModeFunctionStack addressing m
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RelativeModeFunctionRelative addres
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Direct Bit Relativeex.: Mnemonic Ma
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Absolute Bit Relativeex. : Mnemonic
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Stack Pointer Relative Indirect Ind
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Block TransferModeFunctionBlock tra
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Instructions4. Instructions4.1 Inst
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Instructions4.1.2 Arithmetic Instru
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InstructionsCategory Instruction De
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InstructionsThe table below lists t
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AND logical AND ANDOperation Acc f-
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BBC Branch on Bit Clear BBCOperatio
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BeeBranch on Carry ClearBeeOperatio
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BEQBranch on EqualBEQOperationWhen
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BNEBranch on Not EqualBNEOperationW
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BRABranch AlwaysBRAOperationFor sho
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eveBranch on Overflow CleareveOpera
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CLBClear BitCLBOperationM (- MA IMM
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,Cli Clear Interrupt Disable Status
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CLPClear Processor StatusCLPOperati
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CMP Compare CMPOperationAcc - MDesc
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CpyCompare Memory and Index Registe
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DEXDecrement Index Register X by On
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DIV Divide DIVOperationB(remainder}
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EOR Exclusive OR Memory with Accumu
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INX Increment Index Register X by O
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JMPJumpJMPOperationIf absolute addr
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LOA Load Accumulator from Memory LO
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LOT Load Immediate to Data Bank Reg
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LOYLoad Index Register Y from Memor
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MPYMultiplyMPYOperationB, A b A x M
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MVP Move Positive MVPOperationMn-k
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ORA OR Memory with Accumulator ORAO
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PElPush Effective Indirect AddressP
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PHAPush Accumulator A on StackPHAOp
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PHDOperationPush Direct Page Regist
Page 117 and 118: PHPPush Processor Status on StackPH
Page 119 and 120: PHXPush Index Register X on StackPH
Page 121 and 122: PLAPull Accumulator A from StackPLA
Page 123 and 124: PLDOperationPull Direct Page Regist
Page 125 and 126: PLTPull Data Bank Register from Sta
Page 127 and 128: PLYPull Index Register Y from Stack
Page 129 and 130: PSHPushPSHM(8) f- OPRH8 f- 8-1M(8)
Page 131 and 132: PULPullPULSf- S+1PSL f- M(S)Sf- S+1
Page 133 and 134: ROL Rotate One Bit Left ROLOperatio
Page 135 and 136: RTIReturn from InterruptRTIOperatio
Page 137 and 138: RTSReturn from SubroutineRTSOperati
Page 139 and 140: SEBSet BitSEBOperationM f- M V IMMI
Page 141 and 142: SEI Set Interrupt Disable Status SE
Page 143 and 144: SEPSet Processor StatusSEPOperation
Page 145 and 146: STPStopSTPOperationDescriptionStop
Page 147 and 148: STYStore Index Register Y in Memory
Page 149 and 150: lASTransfer Accumulator A to Stack
Page 151 and 152: TAYTransfer Accumulator A to Ind~x
Page 153 and 154: TBSTransfer Accumulator B to Stack
Page 155 and 156: TBvTransfer Accumulator B to Index
Page 157 and 158: TOBTransfer Direct Page Register to
Page 159 and 160: TSBTransfer Stack Pointer to Accumu
Page 161 and 162: TXATransfer Index Register X to Acc
Page 163 and 164: TXSTransfer Index Register X to Sta
Page 165 and 166: TVATransfer Index Register Y to Acc
Page 167: TYXTransfer Index Register Y to XTY
Page 171 and 172: Notes for Programming(11) The code
Page 173 and 174: Instruction Execution Sequence6.2 C
Page 175 and 176: Instruction Execution SequenceIE)·
Page 177 and 178: Instruction Execution Sequence{Exam
Page 179 and 180: Instruction Execution Sequence(Exam
Page 185 and 186: Instruction Execution SequenceWhen
Page 187 and 188: Instruction Execution SequenceOpera
Page 189 and 190: Instruction Execution SequenceOpera
Page 193 and 194: APPENDIX ACPU Instruction Execution
Page 195 and 196: ImpliedInstruction :CLC. CLI. CLM.
Page 197 and 198: ImpliedInstructionR T STiming¢I CP
Page 199 and 200: ImpliedInstructionBRKTiming00194
Page 201 and 202: ImmediateInstruction :. L D TTiming
Page 203 and 204: ImmediateInstructionDIV, MPYTimingr
Page 205 and 206: DirectInstructionADC, AND, CMP, CPX
Page 207 and 208: DirectInstructionDIV, MPYTiming~cpu
Page 209 and 210: Direct Indexed XInstructionADC, AND
Page 211 and 212: Direct Indexed XInstructionDIV. MPY
Page 213 and 214: Direct IndirectInstructionADC. AND.
Page 215 and 216: Direct Indexed X IndirectInstructio
Page 217 and 218: Direct Indirect Indexed YInstructio
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Direct Indirect LongInstructionADC,
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Direct Indirect Long Indexed YInstr
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AbsoluteInstructionADC, AND, CMP, C
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AbsoluteInstructionDIV, MPYTimingt/
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Absolute BitInstruction : C L B, S
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Absolute Indexed XInstruction : A S
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Absolute Indexed XAbsolute Indexed
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Absolute LongInstructionAD C, AND,
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Absolute LongInstructionJ M PTiming
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Absolute Long Indexed XInstructionD
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Absolute Indirect LongInstructionJ
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StackInstructionPEA. Timing¢CPUAp(
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StackInstructionP H BTiming4tcpuAp(
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StackInstructionPLPTimingAp(cpu)DAT
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StackInstructionPULTimingPSDATA{Cpu
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Direct Bit RelativeInstructionBBG,
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Stack Pointer RelativeInstruction :
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Stack Pointer Relative Indirect Ind
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Block TransferInstructionMVNTimingI
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APPENDIX BSeries MELPS 7700 Machine
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APPENDIX 8Series MELPS 7700 Machine
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APPENDIX CSeries MELPS 7700 Instruc
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APPENDIX CSeries MELPS 7700 Instruc
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MITSUBISHI SEMICONDUCTORSMELPS 7700
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1989_MELPS_7700_Software_Manual

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