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1989_MELPS_7700_Software_Manual

Mitsubishi MELPS 7700 series microcomputer instruction set and addressing mode handbook

Mitsubishi MELPS 7700 series microcomputer instruction set and addressing mode handbook

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BVS

Branch on Overflow Set

BVS

Operation

When V=1,

PC f- PC + 2 ± REL (REL is instruction's second byte)

PG f- PG + 1 (if carry on PC), PG. f- PG - 1 (if borrow on PC)

When V=O,

PC f- PC + 2

PG f- PG + 1 (if carry on PC)

Description

When the overflow flag V is set (1), the BVS instruction causes a branch to the

specified address. The branch address is specified by a relative address.

When the overflow flag V is clear (0), the program advances to next step without

any action.

Status flags

Not affected.

Addressing mode I Syntax Machine code Bytes Cycles

Relative I BVS rr 7016, rr 2 4

(Note1 )The cycles-count increases by 2 when a branch occurs.

73

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