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1989_MELPS_7700_Software_Manual

Mitsubishi MELPS 7700 series microcomputer instruction set and addressing mode handbook

Mitsubishi MELPS 7700 series microcomputer instruction set and addressing mode handbook

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LSR Logical Shift Right LSR

Operation

When m=O

When m=1

b7

bo

Description

Shifts all bits of the accumulator or memory one place to the right. Bit 15 (or bit

7 if the data length selection flag m is set to 1) of the accumulator or memory is

loaded with O.

The carry flag C is loaded from bit 0 of the data before the shift.

Status flags

IPL : Not affected.

N Cleared to "0".

V Not affected.

m Not affected.

x

o

I

Not affected.

Not affected.

Not affected.

Z Set to 1 when the result of operation is O. Otherwise, cleared to O.

C Set to 1 when bit 0 before the operation is 1. Otherwise, cleared to O.

Addressing mode Syntax Machine code I Bytes Cycles

Accumulator LSR A 4A16

Direct LSR dd 4616, dd 7

I:

Direct indexed X LSR dd, X 5616, dd

7

Absolute LSR mmll 4E16, II, mm 7

Absolute indexed X LSR mmll, X 5E16, II, mm 8

(Note1) The accumulator addressing mode's specification In thiS table applies when uSing the accumulator

A. If using the accumulator B, replace "A" with "B". In this case, "4216" is added at the beginning

of the machine code, the bytes-count increases by 1 and the cycles-count increases by 2.

I~

2

99

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