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1989_MELPS_7700_Software_Manual

Mitsubishi MELPS 7700 series microcomputer instruction set and addressing mode handbook

Mitsubishi MELPS 7700 series microcomputer instruction set and addressing mode handbook

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ROR Rotate One Bit Right ROR

Operation

If m=O,

If m=1,

Description

The carry flag C is linked to the accumulator or memory, and the combined

contents are shifted by 1 bit to the right.

Bit 15 (or bit 7 if the data length selection flag m is set to 1) of the accumulator

or memory is loaded with the content of the carry flag C, and the carry flag

C is loaded with the content of bit 0 of the accumulator or memory before

execution of this instruction.

Status flags

IPL :

N

V

m

x

o

I

Not affected.

Set to 1 when bit 15 (or bit 7 if the data length selection flag m is set to 1) of

the operation result is 1. Otherwise, cleared to O.

Not affected.

Not affected.

Not affected.

Not affected.

Not affected.

Z Set to 1 when the result of operation is O. Otherwise, cleared to O.

C

Set to 1 when bit 0 before execution of the instruction is 1. Otherwise, cleared

to O.

Addressing mode Syntax Machine code Bytes Cycles

Accumulator ROR A 6A16 1 2

Direct ROR dd 6616, dd 2 7

Direct indexed X ROR dd, X 7616, dd 2 7

Absolute ROR mmll 6E16, II, mm 3 7

Absolute indexed X ROR mmll, X 7E16, II, mm 3 8

(Note1) The accumulator addressing mode's specification in this table applies when using the accumulator

A. If using the accumulator B, replace "A" with "8". In this case, "4216" is added at the beginning

of the machine code, the bytes-count increases by 1 and the cycles-count increases by 2.

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