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Bhavin Shah (852) 2800-8538 bhavin.a.shah@jpmorgan.com 314 Asia Pacific Equity Research 20 April 2009 in place, driving adoption/demand for very expensive and advanced products such as dry 193nm ArF and immersion and/or “wet” 193nm ArF lithography tools. Memory chipmakers are actually adopting immersion systems first at 55nm, while most logic chipmakers will adopt immersion at 45nm (Intel is the exception). Interestingly, foundries may use immersion for a 65nm half node shrink, which is essentially 55nm. This is driven by the need for more “process latitude” compared to IDMs such as Intel that produce large volumes of the same device type and can uniquely leverage other lithography “levers” such as expensive and advanced photomasks or dry-double exposure techniques. A substantial reduction in process latitude (i.e. how much error can be tolerated) in photolithography processes increases the demand for more complex lithography tools. As chipmakers pack an increasingly larger number of features onto integrated devices (i.e. chips), they often utilize a tightening of “design rules”. This in turn results in less leeway or error budget in the manufacturing process. The adoption of increasingly aggressive design rules drive demand for more complex and higher priced lithography systems. Our 45nm technology report highlights the drivers of increasing device complexity with a focus on logic chips as the anatomy of a memory device does not change much at 45nm despite the need for more advanced tools for the smaller feature size and more process steps. In particular, major material, architecture, and fabrication technique changes at the transistor level of 45nm logic semiconductor devices, plus the general trend to smaller feature sizes and more metal layers, is driving compelling growth in demand for an increasingly expensive suite of lithography tools. This is the case for the bottom transistor layers of a chip up through the metal interconnect layers that happen to be substantially larger and easier to produce features. Hence, demand is increasing for all three categories of lithography tools, critical, mid-critical, and non-critical. The bottom line is, at 45nm, we estimate the blended ASP in a suite of photolithography tools will be about 50% higher than that at 90nm. The number of lithography steps could increase and blended ASPs could rise as the mix becomes richer In our 45nm <strong>Tech</strong>nology Roadmap report, we forecast a 40% increase in the number of lithography steps (from 30 to 42) for a typical logic process going from 90nm to the 45nm. Increases in the number of patterning steps for logic chips have historically been driven by a larger number of metal “interconnect” layers. While we expect this trend to continue, interconnect layers could increase at a slower pace in the move to 45nm from 90nm (two additional layers) than it did in the move to 90nm from 180nm where many more layers were added. Additional growth in patterning layers at 45nm will be driven by increasing complexity in transistor formation. Tiny transistor layers drive demand for leading edge or “critical” lithography tools from a dimensional perspective as well as for increasingly stringent overlay requirements. This drives the increased demand for 193nm ArF critical layer tools at 45nm (dry for Intel, immersion for most others). It could also drive more demand for 248nm KrF mid-critical tools as the resolution and overlay requirement for non-critical layers become more intense. This also reduces the demand for non-critical 365nm i-Line systems that will increasingly fall out of the mix. This could benefit Cymer as it sells laser light sources for 193nm ArF and 248nm KrF lithography systems. 365nm i-Line tools do not use a laser light source. They use mercury arc lamps.
Bhavin Shah (852) 2800-8538 bhavin.a.shah@jpmorgan.com Asia Pacific Equity Research 20 April 2009 Table 169 summarizes the four categories of lithography tools and their estimated ASPs using ASML’s tools as an example. Table 169: Estimated ASPs of four types of lithography tools Wavelength Estimated ASP i-Line 365nm $6.5MM KrF 248nm $16MM ArF 193nm $23MM ArF Immersion Source: J.P. Morgan estimates. 193nm $ 36MM Table 170 illustrates our estimates for the number of lithography steps for logic and memory devices, including estimates of how the mix of lithography tools used for various steps change with advancing technology nodes. Table 170: Modeled ASP progression of steppers by technology node Total layers ArF Immersion layers ArF layers KrF layers i-line layers Blended ASP (MM$) Logic 90nm 30 0 4 12 14 12.4 Logic 65nm 38 0 11 21 6 16.4 Logic 45nm 42 6 9 21 6 18.9 DRAM 90nm 26 0 6 4 16 11.8 DRAM 65nm 30 0 7 14 9 14.7 DRAM 55nm 32 5 6 14 7 18.3 Flash 90nm 25 0 6 4 16 12.3 Flash 55nm 28 4 5 9 10 16.7 Flash 45nm 30 5 5 11 9 17.6 Source: J.P. Morgan estimates. Lithography is likely to outgrow WFE spending We estimate a 50% increase in the overall cost of a lithography suite at 45nm vs. 90nm. The growth is driven by increasing process steps, partially offset by increasingly productive tools, and rapidly rising ASPs. Figure 197 shows the historical trend of increasing revenues for the lithography segment as a percentage of the overall WFE industry, which we expect to continue. At 45nm, the number of interconnect layers as well as transistor complexity are driving the need for incremental etch systems. In addition, increased gate engineering requirements and tighter control of very thin oxides are increasing the need for additional oxidation steps. Epitax is growing because it is used to control device leakage at smaller nodes. 315
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