Tech Hardware Supply Chain - Gazhoo

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Bhavin Shah (852) 2800-8538 bhavin.a.shah@jpmorgan.com 316 Asia Pacific Equity Research 20 April 2009 Figure 197: Lithography steppers is increasing as a percentage of the total WFE market 22.0% 20.0% 18.0% 16.0% 14.0% 12.0% 1993 1996 1999 2002 2005 2008 Source: Gartner and J.P. Morgan. Figure 198 shows the historical trend of increasing revenues for the etch segment as a percentage of the WFE industry. We believe that the etch segment will sustain growth in its share of the overall WFE market as the number of etch applications continues to grow at 45nm and below, especially as double exposure/double patterning is implemented at 32nm. In the transitions to 45nm and beyond, we expect modest tool productivity increases to be overcome by a stronger underlying trend towards a larger number of etch steps and increasing complexity in logic, foundry and memory fabs, resulting in an increase in the number of etch tools required to support a given number of wafer starts. Figure 198: Etch is increasing as a percentage of the total WFE market 18.0% 16.0% 14.0% 12.0% 10.0% 1993 1996 1999 2002 2005 2008 Source: Gartner and J.P. Morgan. Opportunity for process control We expect process control to be a major beneficiary of the move to complex 45nm process technology. Process control equipment is used to inspect and monitor semiconductor wafers as they undergo a sequence of processing steps on their way to
Bhavin Shah (852) 2800-8538 bhavin.a.shah@jpmorgan.com Asia Pacific Equity Research 20 April 2009 becoming finished products with a view to maximizing the “yield” of functional devices (i.e. integrated circuits) from the wafer. The most important technical trends that we believe will drive increased process control equipment demand and higher priced process control systems include: • A significant increase in the number of process control steps in the transition to the 45nm technology node. • Feature size shrinkage and increasing adoption of leading-edge dry- and immersion-based lithography should drive growth in metrology and inspection, the two major types of process control tools. • The introduction of new materials increases the complexity of various measurements in the chip fabrication process. Also, as many chip fabrication materials and manufacturing techniques are new, they often create yield problems. This should drive an increase in sampling rates. Both factors should boost demand for metrology tools, but also for more expensive/more sensitive higher-priced models. • New device architectures and fabrication techniques that drive process integration challenges and require more complex process control systems to manage yield. • Die size for microprocessors and advanced logic devices will either stabilize or continue to increase, mainly because memory cache size continues to increase even with the transition to 45nm technology as multi-core processors proliferate. As the die size increases, the impact of defects on yield goes up faster than the increase in the die size, driving the need for stringent monitoring of defects to prevent yield crashes. This is also very relevant for Flash chip production as device density grows rapidly. From an economic standpoint, process control equipment is the mechanism for optimizing the return on investment on wafer processing equipment. This is difficult to achieve technically and there are not a lot of strong process control vendors, thus margins are at the high-end of the industry average on high value-add and relatively limited competition. The fundamental reason that process control equipment adds a high level of value is performance, and therefore the yield of the final product (i.e. complex chips) is extremely sensitive to defects and variations in individual processing steps. During the development and ramp-up phase of a device, process control shortens the duration by enabling faster “debugging” of equipment and processes. Also, during volume manufacturing, it enables yield control via monitoring of equipment and processes to ensure that processes are operating within specified limits. The critical relationship between yield and defects can be illustrated by how leading chipmaker Intel uses the trend in defect density to communicate maturation of yield to the outside world, an example of which is shown in Figure 199. 317
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Tech Hardware Supply Chain - Gazhoo

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