Workshopband als PDF - Mpc.belwue.de
Workshopband als PDF - Mpc.belwue.de
Workshopband als PDF - Mpc.belwue.de
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MPC-WORKSHOP FEBRUAR 2013<br />
Figure 3: Transmitter<br />
line encloses the whole token and data packet structure.<br />
As inputs of the whole block there are 7 lines to<br />
write into the registers what wants to be transmitted,<br />
and two “run” lines (Drun & THrun) which enables<br />
the process to send either the data or the token and<br />
handshake packets. As outputs there are the two differential<br />
lines for the USB along with the oeb to control<br />
the output driver line if necessary.<br />
1) Interface with the microcontroller<br />
There are 4 inputs <strong>de</strong>dicated to the parallel data<br />
which can be either an address of a specific register to<br />
write to, or the data that needs to be written. Furthermore,<br />
it can be the upper or a lower nibble of a byte;<br />
two lines are used (a0 & a1) to signal which one it is<br />
according to Table 3. The address is <strong>de</strong>co<strong>de</strong>d and the<br />
load is sent to the corresponding register.<br />
2) Token and Handshake Packets Structure<br />
The structure has several registers to save the data<br />
that will be transmitted; their addresses are stated on<br />
Table 4. The CTRL register provi<strong>de</strong>s important information<br />
about what will be sent out and how. Bit 6, if<br />
set, means a token packet (32 bits) will be sent, otherwise<br />
only a handshake (16 bits).<br />
The calculated CRC and the SOF are loa<strong>de</strong>d from<br />
the CRC calculator and the SOF generator respectively.<br />
While the bit 5 from the CTRL register dictates<br />
whether the calculated CRC or the stored CRC will be<br />
used, the bit 7 activates the host’s functions, i.e., SOF<br />
generation.<br />
Table 3: Interface Data Types<br />
a1 a0 Data Type<br />
0 0 Lower nibble of Data<br />
0 1 Upper nibble of Data<br />
1 0 Lower nibble of Address<br />
1 1 Upper nibble of Address<br />
Table 4: Token and Handshake Registers<br />
Address Register<br />
0x00 SYN<br />
0x01 PID<br />
0x02 ADDR<br />
0x03 ENDP<br />
0x04 CRC stored<br />
0x05 SOF PID<br />
--- SOF<br />
---<br />
CRC<br />
calculated<br />
0x0F CTRL<br />
The SOF generator increments the SOF number and<br />
gives a pulse to begin the transmission at the<br />
appropriate time. The register structure is <strong>de</strong>signed to<br />
be able to change, from sending any token packet to<br />
send a SOF packet, easily.<br />
In or<strong>de</strong>r to maintain control between sending a<br />
normal token, handshake or a data packet and sending<br />
the SOF packets two steps are taken. First, in the clock<br />
block issues a warning signal to announce the<br />
proximity of the new SOF; if the warning signal is<br />
high, no transmission should take place. The second<br />
step consists of a state machine to avoid conflicts<br />
between sending SOF and the two run sign<strong>als</strong>. The<br />
highest priority is given to the SOF packets; if a conflict<br />
arises and both Drun and THrun sign<strong>als</strong> are activated<br />
simultaneously, the sending of token and handshake<br />
packets will have priority.<br />
Every block is controlled by the Control State Machine<br />
for Token and Handshake Packets. When the<br />
run signal is activated, it enables the output and pushes<br />
the data out, validating every bit with a data valid<br />
signal, and receiving feedback from the bit stuffing<br />
block in case a zero bit needs to be inserted. It takes<br />
into account if a token or a handshake packet will be<br />
sent, by keeping track of the number of bits. Once the<br />
PID is sent it enables the CRC calculator and disables<br />
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