High Performance Microchip Supply - Under Secretary of Defense ...

_________________________________________________________________ APPENDIX G
APPENDIX G. COMPARISON OF ASIC AND FPGA SYSTEM
CHARACTERISTICS
Power Dissipation
Utilization of Available Transistors
Signal Processing Performance
Typical Hardware Fabrication Time
Fabrication Cost
Physical Size
Available Sizes
Ability To Upgrade After Put Into Use
Ability To Isolate “Red”/“Black” Regions
Flexibility Of I/O Protocols
ASIC vs FPGA Tradeoffs
ASIC IMPLEMENTATION ISSUES
Availability Of Components For Mixed -Signal
Design
Numbers are Normalized, Where 1 is the Optimum
FIELD PROG.
GATE ARRAY*
2 - 10
0.1 - 0.9
0.1 - 0.5
1
1
4
Limited
Yes
Limited
No
Limited
MASK
PROG.
GATE
ARRAY
HIGH PERFORMANCE MICROCHIP SUPPLY ___________________________________________
99
2
4
2
2
Limited
No
Limited
Limited
* Range Provided for FPGAs Because Some Applications use FPGA Real Estate and
Components More Efficiently Than Others
Yes
Example of tradeoffs ASIC vs
FPGAs for a Space System
0.7
0.5
STANDARD
CELL
ARRAY
1.5
1
0.8
16
7
1.5
No Limit
No
Limited
Parameter ASIC FPGA
Weight (lbs)
Power (W)
Development time (months)
Cost (NRE)
Clock speed (MHz)
Technology (um)
# of gates (Millions)
# of boards
Design reusability
260
2600
27
$30M
180
.18
7.1
20
Low
Yes
Yes
FULL
CUSTOM
1
1
1
16
7
1
No Limit
No
Yes
Yes
Yes
Source: Mayo Clinic
412
4200
5
$1.5M
210
.13
8
40
High
Source: Lockheed Martin