High Performance Microchip Supply - Under Secretary of Defense ...
High Performance Microchip Supply - Under Secretary of Defense ...
High Performance Microchip Supply - Under Secretary of Defense ...
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
___________________________________________________________ RECOMMENDATIONS<br />
hardened components such as nonvolatile memories<br />
to support DOD system requirements and ensure<br />
the maintenance <strong>of</strong> the RHOC roadmap.<br />
RECOMMENDATION 5 – DEVELOP BUSINESS MODELS,<br />
TECHNOLOGY, AND EQUIPMENT FOR ECONOMIC<br />
DEVELOPMENT AND PRODUCTION OF LOW-VOLUME ASICS<br />
Developing cost-effective technology for the design and<br />
fabrication <strong>of</strong> low-production-volume, leading-edge technology<br />
ASICs will require the combined efforts <strong>of</strong> DOD, the semiconductor<br />
industry, and semiconductor fabrication equipment suppliers. The<br />
industry’s emphasis on manufacturing economies <strong>of</strong> scale has led to a<br />
manufacturing approach that is not sufficiently flexible for DOD’s<br />
special circuit needs. Commercial industry is now beginning to<br />
realize a need for economical, limited IC production as well.<br />
Developing an alternative, more flexible approach to integrated<br />
circuit manufacturing demands a thorough reexamination <strong>of</strong> business<br />
models, technology, and manufacturing equipment design. The<br />
<strong>Defense</strong> Advanced Research Projects Agency (DARPA) attempted<br />
such a reexamination in the mid-1990s through its Microelectronics<br />
Manufacturing Science and Technology (MMST) program. That<br />
program had different goals than are required today. DDR&E should<br />
now take another look at ASIC production and formulate a program<br />
to address barriers to low- to medium-volume custom IC production.<br />
This program will require the dedicated, joint effort <strong>of</strong> all<br />
participants in ASIC production - designers, fabricators, and<br />
equipment makers. Such an effort would be similar to SEMATECH,<br />
the industry-initiated, DARPA-supported consortium. DDR&E<br />
should consider working with the existing SEMATECH or<br />
establishing a joint-effort equivalent, to seek solutions for costeffective<br />
manufacturing <strong>of</strong> advanced-technology, custom<br />
semiconductor products in relatively low volumes. We believe this<br />
challenge can be undertaken jointly with university, industry, and<br />
government support. The leadership, however, must come from<br />
DOD. The goal should be to establish a self-sustaining business<br />
HIGH PERFORMANCE MICROCHIP SUPPLY ___________________________________________<br />
71