High Performance Microchip Supply - Under Secretary of Defense ...
High Performance Microchip Supply - Under Secretary of Defense ...
High Performance Microchip Supply - Under Secretary of Defense ...
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FINDINGS ___________________________________________________________________<br />
fully custom integrated circuits and gate array class devices. While<br />
these devices are potentially corruptible, they provide superiority in<br />
functionality, speed, and power consumption. Ensuring that these are<br />
truly trusted devices is <strong>of</strong> the utmost importance.<br />
Processes under control <strong>of</strong> the Foundry<br />
Figure 5<br />
Processes under control <strong>of</strong> the mask maker<br />
The design <strong>of</strong> an ASIC device is a complex process involving a<br />
team <strong>of</strong> engineers that includes specialists in s<strong>of</strong>tware, firmware,<br />
system architecture, timing, circuit and device design, and testing. In<br />
Figure 5, the ASIC design is enclosed in the black dashed line and<br />
mask making in red. The activities in these stages are those that entail<br />
direct access to the chip design database and are thus very high risk,<br />
as is delivery <strong>of</strong> the completed chips. The green box encloses the<br />
fabrication steps under control <strong>of</strong> the foundry, where unauthorized<br />
process changes and outright substitutions are also possible. The<br />
green-enclosed area is the portion <strong>of</strong> the ASIC chip design and<br />
fabrication chain the Trusted Foundry Program is intended to protect.<br />
38 _________________________________________________________ DSB TASK FORCE ON