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Statement List (STL) - DCE FEL ČVUT v Praze

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Shift and Rotate Instructions<br />

11.1.6 SLD Shift Left Double Word (32-Bit)<br />

Formate<br />

Description<br />

Status word<br />

SLD<br />

SLD <br />

Address Data type Description<br />

integer, unsigned number of bit positions to be shifted, range<br />

from 0 to 32<br />

SLD (shift left double word) shifts the entire contents of ACCU 1 to the left bit by bit.<br />

The bit places that are vacated by the shift instruction are filled with zeros. The bit<br />

that is shifted out last is loaded into the status word bit CC 1. The number of bit<br />

positions to be shifted is specified either by the address or by a value in<br />

ACCU 2-L-L.<br />

SLD : The number of shifts is specified by the address . The<br />

permissible value range is from 0 to 32. The status word bits CC 0 and OV are reset<br />

to zero if is greater than zero. If is equal to zero, then the shift<br />

instruction is regarded as a NOP operation.<br />

SLD: The number of shifts is specified by the value in ACCU 2- L- L. The possible<br />

value range is from 0 to 255. A shift number >32 always produces the same result:<br />

ACCU 1 = 0, CC 1 = 0, CC 0 = 0, and OV = 0. If 0 < shift number

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