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Statement List (STL) - DCE FEL ČVUT v Praze

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11.2.3 RRD Rotate Right Double Word (32-Bit)<br />

Formate<br />

Description<br />

Status word<br />

RRD<br />

RRD <br />

Address Data type Description<br />

Shift and Rotate Instructions<br />

integer, unsigned number of bit positions to be rotated, range<br />

from 0 to 32<br />

RRD (rotate right double word) rotates the entire contents of ACCU 1 to the right bit<br />

by bit. The bit places that are vacated by the rotate instruction are filled with the<br />

signal states of the bits that are shifted out of ACCU 1. The bit that is rotated last is<br />

loaded into the status bit CC 1. The number of bit positions to be rotated is specified<br />

either by the address or by a value in ACCU 2-L-L.<br />

RRD : The number of rotations is specified by the address .<br />

The permissible value range is from 0 to 32. The status word bits CC 0 and OV are<br />

reset to 0 if is greater than zero. If equals zero, then the rotate<br />

instruction is regarded as a NOP operation.<br />

RRD: The number of rotations is specified by the value in ACCU 2- L- L. The<br />

possible value range is from 0 to 255. The status word bits are reset to 0 if the<br />

contents of ACCU 2-L-L are greater than zero.<br />

BR CC 1 CC 0 OV OS OR STA RLO /FC<br />

writes: - x x x - - - - -<br />

<strong>Statement</strong> <strong>List</strong> (<strong>STL</strong>) for S7-300 and S7-400 Programming<br />

A5E00706960-01 11-17

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