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Statement List (STL) - DCE FEL ČVUT v Praze

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12.3 FR Enable Timer (Free)<br />

Format<br />

FR <br />

Timer Instructions<br />

Address Data type Memory area Description<br />

TIMER T Timer number, range depends on<br />

CPU<br />

Description of instruction<br />

Status word<br />

Example<br />

When the RLO transitions from "0" to "1", FR clears the edge-detecting flag<br />

that is used for starting the addressed timer. A change in the RLO bit from 0 to 1 in<br />

front of an enable instruction (FR) enables a timer.<br />

Timer enable is not required to start a timer, nor is it required for normal timer<br />

instruction. An enable is used only to re-trigger a running timer, that is, to restart a<br />

timer. The restarting is possible only when the start instruction continues to be<br />

processed with RLO = 1.<br />

BR CC 1 CC 0 OV OS OR STA RLO /FC<br />

writes: - - - - - 0 - - 0<br />

<strong>STL</strong> Explanation<br />

A I 2.0<br />

FR T1 //Enable timer T1.<br />

A I 2.1<br />

L S5T#10s //Preset 10 seconds into ACCU 1.<br />

SI T1 //Start timer T1 as a pulse timer.<br />

A I 2.2<br />

R T1 //Reset timer T1.<br />

A T1 //Check signal state of timer T1.<br />

= Q 4.0<br />

L T1 //Load current time value of timer T1 as a binary number.<br />

T MW10<br />

<strong>Statement</strong> <strong>List</strong> (<strong>STL</strong>) for S7-300 and S7-400 Programming<br />

A5E00706960-01 12-5

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