Statement List (STL) - DCE FEL ČVUT v Praze

Timer Instructions
12.2 Location of a Timer in Memory and Components of a
Timer
Area in Memory
Timers have an area reserved for them in the memory of your CPU. This memory
area reserves one 16-bit word for each timer address. The ladderlogic instruction set
supports 256 timers. Please refer to your CPU’s technical information to establish
the number of timer words available.
The following functions have access to the timer memory area:
• Timer instructions
• Updating of timer words by means of clock timing. This function of your CPU in
the RUN mode decrements a given time value by one unit at the interval
designated by the time base until the time value is equal to zero.
Time Value
Bits 0 through 9 of the timer word contain the time value in binary code. The time
value specifies a number of units. Time updating decrements the time value by one
unit at an interval designated by the time base. Decrementing continues until the
time value is equal to zero. You can load a time value into the low word of
accumulator 1 in binary, hexadecimal, or binary coded decimal (BCD) format.
You can pre-load a time value using either of the following formats:
• W#16#txyz
- Where t = the time base (that is, the time interval or resolution)
- Where xyz = the time value in binary coded decimal format
• S5T#aH_bM_cS_dMS
- Where H = hours, M = minutes, S = seconds, and MS = milliseconds;
user variables are: a, b, c, d
- The time base is selected automatically, and the value is rounded to the next
lower number with that time base.
The maximum time value that you can enter is 9,990 seconds, or 2H_46M_30S.
Statement List (STL) for S7-300 and S7-400 Programming
12-2 A5E00706960-01