Statement List (STL) - DCE FEL ČVUT v Praze

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Bit Logic Instructions 1.15 ) Nesting Closed Format ) Description Status word ) (nesting closed) removes an entry from the nesting stack, restores the OR bit, interconnects the RLO that is contained in the stack entry with the current RLO according to the function code, and assigns the result to the RLO. The OR bit is also included if the function code is "AND" or "AND NOT". Statements which open parentheses groups: • U( And with Nesting Open • UN( And Not with Nesting Open • O( Or with Nesting Open • ON( Or Not with Nesting Open • X( Exclusive Or with Nesting Open • XN( Exclusive Or Not with Nesting Open BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - - - - - x 1 x 1 Statement List (STL) for S7-300 and S7-400 Programming 1-14 A5E00706960-01
Example Statement List Program A( O I 0.0 O M 10.0 ) A( O I 0.2 O M 10.3 ) = Q 4.0 Power rail Q 4.0 Coil Relay Logic Bit Logic Instructions Statement List (STL) for S7-300 and S7-400 Programming A5E00706960-01 1-15 I 0.0 I 0.2 A M 10.1 M 10.1 M 10.0 M10.3
Page 1 and 2: s SIMATIC Statement List (STL) for
Page 3 and 4: Preface Purpose This manual is your
Page 5 and 6: Preface Online Help The manual is c
Page 7 and 8: Contents 1 Bit Logic Instructions 1
Page 9 and 10: Contents 8 Floating-Point Math Inst
Page 11 and 12: Contents 14 Accumulator Instruction
Page 13 and 14: 1 Bit Logic Instructions 1.1 Overvi
Page 15 and 16: 1.2 A And Format A Address Data ty
Page 17 and 18: 1.4 O Or Format O Address Data typ
Page 19 and 20: 1.6 X Exclusive Or Format X Addres
Page 21 and 22: 1.8 O And before Or Format Descript
Page 23 and 24: 1.10 AN( And Not with Nesting Open
Page 25: 1.14 XN( Exclusive Or Not with Nest
Page 29 and 30: 1.17 R Reset Format R Address Data
Page 31 and 32: 1.19 NOT Negate RLO Format Descript
Page 33 and 34: 1.21 CLR Clear RLO (=0) Format Desc
Page 35 and 36: 1.23 FN Edge Negative Format FN Bi
Page 37 and 38: 1.24 FP Edge Positive Format FP Bi
Page 39 and 40: 2 Comparison Instructions 2.1 Overv
Page 41 and 42: 2.3 ? D Compare Double Integer (32-
Page 43 and 44: 3 Conversion Instructions 3.1 Overv
Page 45 and 46: 3.3 ITB Integer (16-Bit) to BCD For
Page 47 and 48: 3.5 ITD Integer (16 Bit) to Double
Page 49 and 50: Conversion Instructions 3.7 DTR Dou
Page 51 and 52: Conversion Instructions 3.9 INVD On
Page 53 and 54: Conversion Instructions 3.11 NEGD T
Page 55 and 56: Conversion Instructions 3.13 CAW Ch
Page 57 and 58: 3.15 RND Round Format Description S
Page 59 and 60: 3.17 RND+ Round to Upper Double Int
Page 61 and 62: 4 Counter Instructions 4.1 Overview
Page 63 and 64: 4.3 L Load Current Counter Value in
Page 65 and 66: 4.5 R Reset Counter Format Descript
Page 67 and 68: 4.7 CU Counter Up Format CU Counte
Page 69 and 70: 5 Data Block Instructions 5.1 Overv
Page 71 and 72: 5.3 CDB Exchange Shared DB and Inst
Page 73 and 74: Data Block Instructions 5.6 L DILG
Page 75 and 76: 6 Logic Control Instructions 6.1 Ov
Page 77 and 78:
6.2 JU Jump Unconditional Format De
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6.4 JC Jump if RLO = 1 Format Descr
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6.6 JCB Jump if RLO = 1 with BR For
Page 83 and 84:
6.8 JBI Jump if BR = 1 Format Descr
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6.10 JO Jump if OV = 1 Format Descr
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6.12 JZ Jump if Zero Format Descrip
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6.14 JP Jump if Plus Format Descrip
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6.16 JPZ Jump if Plus or Zero Forma
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6.18 JUO Jump if Unordered Format D
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7 Integer Math Instructions 7.1 Ove
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Integer Math Instructions 7.3 +I Ad
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Integer Math Instructions 7.5 *I Mu
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Example: 13 divided by 4 Contents o
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Example 3 STL Explanation L MD20 L
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Integer Math Instructions 7.9 -D Su
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Integer Math Instructions 7.11 /D D
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Integer Math Instructions 7.12 MOD
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8 Floating-Point Math Instructions
Page 113 and 114:
8.3 Floating-Point Math Instruction
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Floating-Point Math Instructions 8.
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9 Load and Transfer Instructions 9.
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Contents of ACCU 1 Load and Transfe
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Load and Transfer Instructions 9.4
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9.9 T Transfer Format Description S
Page 141 and 142:
Page 143 and 144:
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10 Program Control Instructions 10.
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10.3 BEC Block End Conditional Form
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10.5 CALL Block Call Format Descrip
Page 151 and 152:
10.6 Call FB Format Description CAL
Page 153 and 154:
10.7 Call FC Format Description CAL
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10.8 Call SFB Format Description CA
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10.9 Call SFC Format Description CA
Page 159 and 160:
10.12 CC Conditional Call Format De
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10.14 MCR (Master Control Relay) !
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10.15 Important Notes on Using MCR
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Example Program Control Instruction
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10.18 MCRA Activate MCR Area Format
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11 Shift and Rotate Instructions 11
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Example 1 STL Explanation L MW4 //L
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Examples Shift and Rotate Instructi
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11.2.2 RLD Rotate Left Double Word
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11.2.3 RRD Rotate Right Double Word
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11.2.4 RLDA Rotate ACCU 1 Left via
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12 Timer Instructions 12.1 Overview
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Time Base Timer Instructions Bits 1
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12.3 FR Enable Timer (Free) Format
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Timer Instructions 12.4 L Load Curr
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Timer Instructions 12.5 LC Load Cur
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12.6 R Reset Timer Format R Timer
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Enable input Start input Reset inpu
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Enable Input Start Input Reset Inpu
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13 Word Logic Instructions 13.1 Ove
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Examples Word Logic Instructions Bi
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Page 223 and 224:
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14 Accumulator Instructions 14.1 Ov
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14.3 POP CPU with Two ACCUs Format
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14.5 PUSH CPU with Two ACCUs Format
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14.7 ENT Enter ACCU Stack Format De
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14.10 DEC Decrement ACCU 1-L-L Form
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14.12 +AR2 Add ACCU 1 to Address Re
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14.15 NOP 1 Null Instruction Format
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A Overview of All STL Instructions
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German Mnemonics English Mnemonics
Page 243 and 244:
German Mnemonics English Mnemonics
Page 245 and 246:
Overview of All STL Instructions A.
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English Mnemonics German Mnemonics
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English Mnemonics German Mnemonics
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B Programming Examples B.1 Overview
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Absolute and symbolic Programming P
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Absolute and symbolic Programming P
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B.3 Example: Timer Instructions Clo
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Signal states of the Bits of Memory
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Statement List that Activates the I
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B.6 Example: Word Logic Instruction
Page 265 and 266:
C Parameter Transfer ! The paramete
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Index ) ) .........................
Page 269 and 270:
I -I ..............................
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SLD................................
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Statement List (STL) - DCE FEL ČVUT v Praze

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