26.10.2012 Views

Statement List (STL) - DCE FEL ČVUT v Praze

Statement List (STL) - DCE FEL ČVUT v Praze

Statement List (STL) - DCE FEL ČVUT v Praze

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Signal states of the Bits of Memory MB 101<br />

Scan<br />

Cycle<br />

Programming Examples<br />

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Time Value<br />

in ms<br />

0 0 0 0 0 0 0 0 0 250<br />

1 0 0 0 0 0 0 0 1 250<br />

2 0 0 0 0 0 0 1 0 250<br />

3 0 0 0 0 0 0 1 1 250<br />

4 0 0 0 0 0 1 0 0 250<br />

5 0 0 0 0 0 1 0 1 250<br />

6 0 0 0 0 0 1 1 0 250<br />

7 0 0 0 0 0 1 1 1 250<br />

8 0 0 0 0 1 0 0 0 250<br />

9 0 0 0 0 1 0 0 1 250<br />

10 0 0 0 0 1 0 1 0 250<br />

11 0 0 0 0 1 0 1 1 250<br />

12 0 0 0 0 1 1 0 0 250<br />

Signal state of Bit 1 of MB 101 (M 101.1)<br />

Frequency = 1/T = 1/1 s = 1 Hz<br />

M 101.1<br />

1<br />

0<br />

0<br />

250 ms 0.5 s 0.75 s 1 s 1.25 s 1.5 s<br />

<strong>Statement</strong> <strong>List</strong> (<strong>STL</strong>) for S7-300 and S7-400 Programming<br />

A5E00706960-01 B-9<br />

T<br />

Time

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!