Statement List (STL) - DCE FEL ČVUT v Praze

11.2.2 RLD Rotate Left Double Word (32-Bit)
Format
Description
Status word
RLD
RLD
Address Data type Description
Shift and Rotate Instructions
integer, unsigned number of bit positions to be rotated, range
from 0 to 32
RLD (rotate left double word) rotates the entire contents of ACCU1 to the left bit by
bit. The bit places that are vacated by the rotate instruction are filled with the signal
states of the bits that are shifted out of ACCU 1. The bit that is rotated last is loaded
into the status bit CC 1. The number of bit positions to be rotated is specified either
by the address or by a value in ACCU 2-L-L.
RLD : The number of rotations is specified by the address .
The permissible value range is from 0 to 32. The status word bits CC 0 and OV are
reset to 0 if is greater than zero. If is equal to 0, the rotate
instruction is regarded as a NOP operation.
RLD: The number of rotations is specified by the value in ACCU 2- L- L. The
possible value range is from 0 to 255. The status word bits CC 0 and OV are reset to
0 if the contents of ACCU 2-L-L are greater than zero. If the rotation number is zero,
then the rotate instruction is regarded as an NOP operation.
BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - x x x - - - - -
Statement List (STL) for S7-300 and S7-400 Programming
A5E00706960-01 11-15