Statement List (STL) - DCE FEL ČVUT v Praze

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Word Logic Instructions 13.5 AD AND Double Word (32-Bit) Format AD AD Address Data type Description DWORD, 32-bit constant Description of instruction Status word Bit pattern to be combined with ACCU 1 by AND AD (AND double word) combines the contents of ACCU 1 with ACCU 2 or a 32-bit constant bit by bit according to the Boolean logic operation AND. A bit in the result double word is "1" only when the corresponding bits of both double words combined in the logic operation are "1". The result is stored in ACCU 1. ACCU 2 (and ACCU 3 and ACCU 4 for CPU’s with four ACCUs) remains unchanged. The status bit CC 1 is set as a result of the operation (CC 1 = 1 if result is unequal to zero). The status word bits CC 0 and OV are reset to 0. AD: Combines ACCU 1 with ACCU 2. AD : Combines ACCU 1 with a 32-bit constant. BR CC 1 CC 0 OV OS OR STA RLO /FC writes: - x 0 0 - - - - - Statement List (STL) for S7-300 and S7-400 Programming 13-8 A5E00706960-01
Examples Word Logic Instructions Bit 31 . . . . . . . . . . . . . . . . . 0 ACCU 1 before execution of UD 0101 0000 1111 1100 1000 1001 0011 1011 ACCU 2 or 32-bit constante 1111 0011 1000 0101 0111 0110 1011 0101 Result (ACCU 1) after execution of UD 0101 0000 1000 0100 0000 0000 0011 0001 Example 1 STL Explanation L ID20 //Load contents of ID20 into ACCU 1. L ID24 //Load contents of ACCU 1 into ACCU 2. Load contents of ID24 into ACCU 1. AD //Combine bits from ACCU 1 with ACCU 2 by AND, store result in ACCU 1. T MD8 //Transfer result to MD8. Example 2 STL Explanation L ID 20 //Load contents of ID20 into ACCU 1. AD DW#16#0FFF_EF21 //Combine bits of ACCU 1 with bit pattern of 32-bit constant (0000_1111_1111_1111_1110_1111_0010_0001) by AND; store result in ACCU 1. JP NEXT //Jump to NEXT jump label if result is unequal to zero, (CC 1 = 1). Statement List (STL) for S7-300 and S7-400 Programming A5E00706960-01 13-9
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s SIMATIC Statement List (STL) for
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Preface Purpose This manual is your
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Preface Online Help The manual is c
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Contents 1 Bit Logic Instructions 1
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Contents 8 Floating-Point Math Inst
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Contents 14 Accumulator Instruction
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1 Bit Logic Instructions 1.1 Overvi
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1.2 A And Format A Address Data ty
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1.4 O Or Format O Address Data typ
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1.6 X Exclusive Or Format X Addres
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1.8 O And before Or Format Descript
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1.10 AN( And Not with Nesting Open
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1.14 XN( Exclusive Or Not with Nest
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Example Statement List Program A( O
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1.17 R Reset Format R Address Data
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1.19 NOT Negate RLO Format Descript
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1.21 CLR Clear RLO (=0) Format Desc
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1.23 FN Edge Negative Format FN Bi
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1.24 FP Edge Positive Format FP Bi
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2 Comparison Instructions 2.1 Overv
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2.3 ? D Compare Double Integer (32-
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3 Conversion Instructions 3.1 Overv
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3.3 ITB Integer (16-Bit) to BCD For
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3.5 ITD Integer (16 Bit) to Double
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Conversion Instructions 3.7 DTR Dou
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Conversion Instructions 3.9 INVD On
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Conversion Instructions 3.11 NEGD T
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Conversion Instructions 3.13 CAW Ch
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3.15 RND Round Format Description S
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3.17 RND+ Round to Upper Double Int
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4 Counter Instructions 4.1 Overview
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4.3 L Load Current Counter Value in
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4.5 R Reset Counter Format Descript
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4.7 CU Counter Up Format CU Counte
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5 Data Block Instructions 5.1 Overv
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5.3 CDB Exchange Shared DB and Inst
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Data Block Instructions 5.6 L DILG
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6 Logic Control Instructions 6.1 Ov
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6.2 JU Jump Unconditional Format De
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6.4 JC Jump if RLO = 1 Format Descr
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6.6 JCB Jump if RLO = 1 with BR For
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6.8 JBI Jump if BR = 1 Format Descr
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6.10 JO Jump if OV = 1 Format Descr
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6.12 JZ Jump if Zero Format Descrip
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6.14 JP Jump if Plus Format Descrip
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6.16 JPZ Jump if Plus or Zero Forma
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6.18 JUO Jump if Unordered Format D
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7 Integer Math Instructions 7.1 Ove
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Integer Math Instructions 7.3 +I Ad
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Integer Math Instructions 7.5 *I Mu
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Example: 13 divided by 4 Contents o
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Example 3 STL Explanation L MD20 L
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Integer Math Instructions 7.9 -D Su
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Integer Math Instructions 7.11 /D D
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Integer Math Instructions 7.12 MOD
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8 Floating-Point Math Instructions
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8.3 Floating-Point Math Instruction
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Floating-Point Math Instructions 8.
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9 Load and Transfer Instructions 9.
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Contents of ACCU 1 Load and Transfe
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Load and Transfer Instructions 9.4
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9.9 T Transfer Format Description S
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10 Program Control Instructions 10.
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10.3 BEC Block End Conditional Form
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10.5 CALL Block Call Format Descrip
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10.6 Call FB Format Description CAL
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10.7 Call FC Format Description CAL
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10.8 Call SFB Format Description CA
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10.9 Call SFC Format Description CA
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10.12 CC Conditional Call Format De
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10.14 MCR (Master Control Relay) !
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10.15 Important Notes on Using MCR
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Example Program Control Instruction
Page 167 and 168: 10.18 MCRA Activate MCR Area Format
Page 169 and 170: 11 Shift and Rotate Instructions 11
Page 171 and 172: Example 1 STL Explanation L MW4 //L
Page 173 and 174: Examples Shift and Rotate Instructi
Page 183 and 184: 11.2.2 RLD Rotate Left Double Word
Page 185 and 186: 11.2.3 RRD Rotate Right Double Word
Page 187 and 188: 11.2.4 RLDA Rotate ACCU 1 Left via
Page 189 and 190: 12 Timer Instructions 12.1 Overview
Page 191 and 192: Time Base Timer Instructions Bits 1
Page 193 and 194: 12.3 FR Enable Timer (Free) Format
Page 195 and 196: Timer Instructions 12.4 L Load Curr
Page 197 and 198: Timer Instructions 12.5 LC Load Cur
Page 199 and 200: 12.6 R Reset Timer Format R Timer
Page 201 and 202: Enable input Start input Reset inpu
Page 205 and 206: Enable Input Start Input Reset Inpu
Page 211 and 212: 13 Word Logic Instructions 13.1 Ove
Page 213 and 214: Examples Word Logic Instructions Bi
Page 217: Examples Word Logic Instructions Bi
Page 225 and 226: 14 Accumulator Instructions 14.1 Ov
Page 227 and 228: 14.3 POP CPU with Two ACCUs Format
Page 229 and 230: 14.5 PUSH CPU with Two ACCUs Format
Page 231 and 232: 14.7 ENT Enter ACCU Stack Format De
Page 233 and 234: 14.10 DEC Decrement ACCU 1-L-L Form
Page 235 and 236: 14.12 +AR2 Add ACCU 1 to Address Re
Page 237 and 238: 14.15 NOP 1 Null Instruction Format
Page 239 and 240: A Overview of All STL Instructions
Page 241 and 242: German Mnemonics English Mnemonics
Page 243 and 244: German Mnemonics English Mnemonics
Page 245 and 246: Overview of All STL Instructions A.
Page 247 and 248: English Mnemonics German Mnemonics
Page 249 and 250: English Mnemonics German Mnemonics
Page 251 and 252: B Programming Examples B.1 Overview
Page 253 and 254: Absolute and symbolic Programming P
Page 255 and 256: Absolute and symbolic Programming P
Page 257 and 258: B.3 Example: Timer Instructions Clo
Page 259 and 260: Signal states of the Bits of Memory
Page 261 and 262: Statement List that Activates the I
Page 263 and 264: B.6 Example: Word Logic Instruction
Page 265 and 266: C Parameter Transfer ! The paramete
Page 267 and 268: Index ) ) .........................
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I -I ..............................
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SLD................................
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Statement List (STL) - DCE FEL ČVUT v Praze

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